Neuron inspired data encoding memristive multi-level memory cell

no code implementations • 14 Mar 2018 • Aidana Irmanova, Alex Pappachen James

Mapping neuro-inspired algorithms to sensor backplanes of on-chip hardware require shifting the signal processing from digital to the analog domain, demanding memory technologies beyond conventional CMOS binary storage units.

Automated rating of recorded classroom presentations using speech analysis in kazakh

no code implementations • 1 Jan 2018 • Akzharkyn Izbassarova, Aidana Irmanova, A. P. James

As the pace of the speech and its optimal intonation varies from language to language, developing an automatic identification of language during the presentation is required.

On-chip Face Recognition System Design with Memristive Hierarchical Temporal Memory

no code implementations • 24 Sep 2017 • Timur Ibrayev, Ulan Myrzakhan, Olga Krestinskaya, Aidana Irmanova, Alex Pappachen James

Hierarchical Temporal Memory is a new machine learning algorithm intended to mimic the working principle of neocortex, part of the human brain, which is responsible for learning, classification, and making predictions.

Emerging Technologies