no code implementations • 18 Nov 2019 • Ke He, Bo Liu, Yu Zhang, Andrew Ling, Dian Gu
In this paper, we firstly propose the FeCaffe, i. e. FPGA-enabled Caffe, a hierarchical software and hardware design methodology based on the Caffe to enable FPGA to support mainline deep learning development features, e. g. training and inference with Caffe.
