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Found 2 papers, 1 papers with code
Analysis of Distributed Optimization Algorithms on a Real Processing-In-Memory System
Processor-centric architectures (e. g., CPU, GPU) commonly used for modern ML training workloads are limited by the data movement bottleneck, i. e., due to repeatedly accessing the training dataset.
Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction
To this end, we propose a new technique called Hermes, whose key idea is to: 1) accurately predict which load requests might go off-chip, and 2) speculatively fetch the data required by the predicted off-chip loads directly from the main memory, while also concurrently accessing the cache hierarchy for such loads.
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