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Found 9 papers, 1 papers with code
How Robust is Federated Learning to Communication Error? A Comparison Study Between Uplink and Downlink Channels
It is also shown that the uplink communication in FL can tolerate a higher bit error rate (BER) than downlink communication, and this difference is quantified by a proposed formula.
Step-GRAND: A Low Latency Universal Soft-input Decoder
GRAND features both soft-input and hard-input variants that are well suited to efficient hardware implementations that can be characterized with achievable average and worst-case decoding latency.
A 137.5 TOPS/W SRAM Compute-in-Memory Macro with 9-b Memory Cell-Embedded ADCs and Signal Margin Enhancement Techniques for AI Edge Applications
In this paper, we propose a high-precision SRAM-based CIM macro that can perform 4x4-bit MAC operations and yield 9-bit signed output.
FedDQ: Communication-Efficient Federated Learning with Descending Quantization
Experimental results show that the proposed descending quantization scheme can save up to 65. 2% of the communicated bit volume and up to 68% of the communication rounds, when compared with existing schemes.
Microshift: An Efficient Image Compression Algorithm for Hardware
In our method, the image is first micro-shifted, then the sub-quantized values are further compressed.
Tight Compression: Compressing CNN Through Fine-Grained Pruning and Weight Permutation for Efficient Implementation
Through permutation, the optimal arrangement of the weight matrix is obtained, and the sparse weight matrix is further compressed to a small and dense format to make full use of the hardware resources.
Accelerating Large Kernel Convolutions with Nested Winograd Transformation.pdf
This work proposes a nested Winograd algorithm that iteratively decomposes a large kernel convolution into small kernel convolutions and proves it to be more effective than the linear decomposition Winograd transformation algorithm.
Polyimide-Based Flexible Coupled-Coils Design and Load-Shift Keying Analysis
A thorough analysis is done for the ideal and practical scenario and it shows that a mismatched secondary LC tank will affect the communication range and communication correctness.
SparseNN: An Energy-Efficient Neural Network Accelerator Exploiting Input and Output Sparsity
Furthermore, an energy-efficient hardware architecture, SparseNN, is proposed to exploit both the input and output sparsity.
