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Found 13 papers, 0 papers with code
Synaptic Scaling and Optimal Bias Adjustments for Power Reduction in Neuromorphic Systems
Recent animal studies have shown that biological brains can enter a low power mode in times of food scarcity.
Exploiting Logic Locking for a Neural Trojan Attack on Machine Learning Accelerators
If an incorrect secret key is used, a set of deterministic errors is produced in locked modules, restricting unauthorized use.
Accelerating the training of single-layer binary neural networks using the HHL quantum algorithm
The solution is encoded in superposition at the output of a quantum circuit.
Enhancing Adversarial Attacks on Single-Layer NVM Crossbar-Based Neural Networks with Power Consumption Information
Adversarial attacks on state-of-the-art machine learning models pose a significant threat to the safety and security of mission-critical autonomous systems.
Model Extraction and Adversarial Attacks on Neural Networks using Switching Power Information
Artificial neural networks (ANNs) have gained significant popularity in the last decade for solving narrow AI problems in domains such as healthcare, transportation, and defense.
On the Adversarial Robustness of Quantized Neural Networks
Reducing the size of neural network models is a critical step in moving AI from a cloud-centric to an edge-centric (i. e. on-device) compute paradigm.
Exploring Energy-Accuracy Tradeoffs in AI Hardware
For simple binary decision problems with convolutional neural networks, it is shown that minimizing the cost corresponds to using fewer than the maximum number of resources (e. g. convolutional neural network layers and filters).
Energy Constraints Improve Liquid State Machine Performance
A model of metabolic energy constraints is applied to a liquid state machine in order to analyze its effects on network performance.
A Low-Power Domino Logic Architecture for Memristor-Based Neuromorphic Computing
We propose a domino logic architecture for memristor-based neuromorphic computing.
An FPGA Implementation of a Time Delay Reservoir Using Stochastic Logic
This paper presents and demonstrates a stochastic logic time delay reservoir design in FPGA hardware.
Current-mode Memristor Crossbars for Neuromemristive Systems
Motivated by advantages of current-mode design, this brief contribution explores the implementation of weight matrices in neuromemristive systems via current-mode memristor crossbar circuits.
Design of a Time Delay Reservoir Using Stochastic Logic: A Feasibility Study
This paper presents a stochastic logic time delay reservoir design.
Unsupervised Learning in Neuromemristive Systems
Neuromemristive systems (NMSs) currently represent the most promising platform to achieve energy efficient neuro-inspired computation.
