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A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures
This survey provides a holistic review of the most influential design methodologies and EDA tools proposed in recent years to implement Deep Learning accelerators, offering the reader a wide perspective in this rapidly evolving field.
A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms
Recent trends in deep learning (DL) imposed hardware accelerators as the most viable solution for several classes of high-performance computing (HPC) applications such as image classification, computer vision, and speech recognition.
Binary stochasticity enabled highly efficient neuromorphic deep learning achieves better-than-software accuracy
We propose a binary stochastic learning algorithm that modifies all elementary neural network operations, by introducing (i) stochastic binarization of both the forwarding signals and the activation function derivatives, (ii) signed binarization of the backpropagating errors, and (iii) step-wised weight updates.
One-step regression and classification with crosspoint resistive memory arrays
Here we show a crosspoint resistive memory circuit with feedback configuration can execute linear regression and logistic regression in just one step by computing the pseudoinverse matrix of the data within the memory.
