Search Results for author:
Found 15 papers, 3 papers with code
Limits of Transformer Language Models on Learning Algorithmic Compositions
We analyze the capabilities of Transformer language models on learning discrete algorithms.
Zero-shot Classification using Hyperdimensional Computing
Classification based on Zero-shot Learning (ZSL) is the ability of a model to classify inputs into novel classes on which the model has not previously seen any training examples.
Ranked #3 on
Zero-Shot Learning
on CUB-200-2011
TCNCA: Temporal Convolution Network with Chunked Attention for Scalable Sequence Processing
We build upon their approach by replacing the linear recurrence with a special temporal convolutional network which permits larger receptive field size with shallower networks, and reduces the computational complexity to $O(L)$.
MIMONets: Multiple-Input-Multiple-Output Neural Networks Exploiting Computation in Superposition
MIMONets augment various deep neural network architectures with variable binding mechanisms to represent an arbitrary number of inputs in a compositional data structure via fixed-width distributed representations.
Factorizers for Distributed Sparse Block Codes
We provide a methodology to flexibly integrate our factorizer in the classification layer of CNNs with a novel loss function.
In-memory factorization of holographic perceptual representations
Disentanglement of constituent factors of a sensory signal is central to perception and cognition and hence is a critical task for future artificial intelligence systems.
In-memory Realization of In-situ Few-shot Continual Learning with a Dynamically Evolving Explicit Memory
We demonstrate for the first time how the EM unit can physically superpose multiple training examples, expand to accommodate unseen classes, and perform similarity search during inference, using operations on an IMC core based on phase-change memory (PCM).
Constrained Few-shot Class-incremental Learning
Moreover, it is imperative that such learning must respect certain memory and computational constraints such as (i) training samples are limited to only a few per class, (ii) the computational cost of learning a novel class remains constant, and (iii) the memory footprint of the model grows at most linearly with the number of classes observed.
Ranked #4 on
Few-Shot Class-Incremental Learning
on mini-Imagenet
continual few-shot learning
Few-Shot Class-Incremental Learning
+1
Generalized Key-Value Memory to Flexibly Adjust Redundancy in Memory-Augmented Networks
Memory-augmented neural networks enhance a neural network with an external key-value memory whose complexity is typically dominated by the number of support vectors in the key memory.
A Heterogeneous In-Memory Computing Cluster For Flexible End-to-End Inference of Real-World Deep Neural Networks
Furthermore, we explore the requirements for end-to-end inference of a full mobile-grade DNN (MobileNetV2) in terms of IMC array resources, by scaling up our heterogeneous architecture to a multi-array accelerator.
Robust High-dimensional Memory-augmented Neural Networks
Traditional neural networks require enormous amounts of data to build their complex mappings during a slow training procedure that hinders their abilities for relearning and adapting to new data.
Few-Shot Image Classification
Vocal Bursts Intensity Prediction
ChewBaccaNN: A Flexible 223 TOPS/W BNN Accelerator
Furthermore, it can perform inference on a binarized ResNet-18 trained with 8-bases Group-Net to achieve a 67. 5% Top-1 accuracy with only 3. 0 mJ/frame -- at an accuracy drop of merely 1. 8% from the full-precision ResNet-18.
ESSOP: Efficient and Scalable Stochastic Outer Product Architecture for Deep Learning
Strategies to improve the efficiency of MVM computation in hardware have been demonstrated with minimal impact on training accuracy.
In-memory hyperdimensional computing
Hyperdimensional computing (HDC) is an emerging computational framework that takes inspiration from attributes of neuronal circuits such as hyperdimensionality, fully distributed holographic representation, and (pseudo)randomness.
XNORBIN: A 95 TOp/s/W Hardware Accelerator for Binary Convolutional Neural Networks
Deploying state-of-the-art CNNs requires power-hungry processors and off-chip memory.
