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Area and Power Efficient FFT/IFFT Processor for FALCON Post-Quantum Cryptography
Since a hardware implementation of FFT/IFFT over the ring is currently non-existent, the execution time achieved by this processor is compared to the software implementation of FFT/IFFT of FALCON on a Raspberry Pi 4 with Cortex-A72, where the proposed processor achieves a speedup of up to 2. 3$\times$.
Number Systems for Deep Neural Network Architectures: A Survey
The reader will be able to understand the importance of an efficient number system for DNN, learn about the widely used number systems for DNN, understand the trade-offs between various number systems, and consider various design aspects that affect the impact of number systems on DNN performance.
C3PU: Cross-Coupling Capacitor Processing Unit Using Analog-Mixed Signal In-Memory Computing for AI Inference
The 5x4 C3PU consumed energy of 66. 4 fJ/MAC at 0. 3 V voltage supply with an error of 5. 7%.
Deep Neural Networks Based Weight Approximation and Computation Reuse for 2-D Image Classification
This leads to a repetition of the weights across the processing element (PE) array, which in turn enables the reuse of the DNN sub-computations (computational reuse) and leverage the same data (data reuse) to reduce DNNs computations, memory accesses, and improve energy efficiency albeit at the cost of increased training time.
