DSLOT-NN: Digit-Serial Left-to-Right Neural Network Accelerator

no code implementations • 12 Sep 2023 • Muhammad Sohail Ibrahim, Muhammad Usman, Malik Zohaib Nisar, Jeong-A Lee

We propose a Digit-Serial Left-tO-righT (DSLOT) arithmetic based processing technique called DSLOT-NN with aim to accelerate inference of the convolution operation in the deep neural networks (DNNs).

Low-Latency Online Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays

no code implementations • 6 Apr 2023 • Muhammad Usman, Milos Ercegovac, Jeong-A Lee

Serial nature of the online algorithm and gradual increment/decrement of active slices minimize the interconnects and signal activities resulting in overall reduction of area and power consumption.

Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays

no code implementations • 11 Apr 2022 • Muhammad Usman, Jeong-A Lee, Milos D. Ercegovac

Synthesis results of the proposed designs have been presented and compared with the non-pipelined online multiplier, pipelined online multiplier with full working precision and conventional serial-parallel and array multipliers.