Search Results for author: Jongse Park

Found 6 papers, 1 papers with code

DaCapo: Accelerating Continuous Learning in Autonomous Systems for Video Analytics

no code implementations21 Mar 2024 Yoonsung Kim, Changhun Oh, Jinwoo Hwang, Wonung Kim, Seongryong Oh, Yubin Lee, Hardik Sharma, Amir Yazdanbakhsh, Jongse Park

Deep neural network (DNN) video analytics is crucial for autonomous systems such as self-driving vehicles, unmanned aerial vehicles (UAVs), and security robots.

Accelerating String-Key Learned Index Structures via Memoization-based Incremental Training

no code implementations18 Mar 2024 Minsu Kim, Jinwoo Hwang, Guseul Heo, Seiyeon Cho, Divya Mahajan, Jongse Park

Learned indexes use machine learning models to learn the mappings between keys and their corresponding positions in key-value indexes.

CoVA: Exploiting Compressed-Domain Analysis to Accelerate Video Analytics

1 code implementation2 Jul 2022 Jinwoo Hwang, Minsu Kim, Daeun Kim, Seungho Nam, Yoonsung Kim, Dohee Kim, Hardik Sharma, Jongse Park

This paper presents CoVA, a novel cascade architecture that splits the cascade computation between compressed domain and pixel domain to address the decoding bottleneck, supporting both temporal and spatial queries.

FlexBlock: A Flexible DNN Training Accelerator with Multi-Mode Block Floating Point Support

no code implementations13 Mar 2022 Seock-Hwan Noh, Jahyun Koo, SeungHyun Lee, Jongse Park, Jaeha Kung

While several prior works proposed such multi-precision support for DNN accelerators, not only do they focus only on the inference, but also their core utilization is suboptimal at a fixed precision and specific layer types when the training is considered.

Multi-model Machine Learning Inference Serving with GPU Spatial Partitioning

no code implementations1 Sep 2021 Seungbeom Choi, Sunho Lee, Yeonjae Kim, Jongse Park, Youngjin Kwon, Jaehyuk Huh

To maximize the resource efficiency of inference servers, a key mechanism proposed in this paper is to exploit hardware support for spatial partitioning of GPU resources.

BIG-bench Machine Learning Scheduling

Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Networks

no code implementations5 Dec 2017 Hardik Sharma, Jongse Park, Naveen Suda, Liangzhen Lai, Benson Chau, Joon Kyung Kim, Vikas Chandra, Hadi Esmaeilzadeh

Compared to Stripes, BitFusion provides 2. 6x speedup and 3. 9x energy reduction at 45 nm node when BitFusion area and frequency are set to those of Stripes.

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