1 code implementation • International Conference on Field-Programmable Logic and Applications (FPL) 2021 • David Castells-Rufas, Santiago Marco-Sola, Quim Aguado-Puig, Antonio Espinosa-Morales, Juan Carlos Moure, Lluc Alvarez, Miquel Moretó
An FPGA accelerator for the computation of the semi-global Levenshtein distance between a pattern and a reference text is presented.