Search Results for author:
Found 12 papers, 0 papers with code
Towards Efficient In-memory Computing Hardware for Quantized Neural Networks: State-of-the-art, Open Challenges and Perspectives
Limited energy and computational resources on edge push the transition from traditional von Neumann architectures to In-memory Computing (IMC), especially for machine learning and neural network applications.
AM-DCGAN: Analog Memristive Hardware Accelerator for Deep Convolutional Generative Adversarial Networks
Generative Adversarial Network (GAN) is a well known computationally complex algorithm requiring signficiant computational resources in software implementations including large amount of data to be trained.
Variation-aware Binarized Memristive Networks
Moreover, we introduce means to mitigate the adverse effect of memristive variations in our proposed networks.
Wafer Quality Inspection using Memristive LSTM, ANN, DNN and HTM
The automated wafer inspection and quality control is a complex and time-consuming task, which can speed up using neuromorphic memristive architectures, as a separate inspection device or integrating directly into sensors.
Learning in Memristive Neural Network Architectures using Analog Backpropagation Circuits
The circuit level design and implementation of backpropagation algorithm using gradient descent operation for neural network architectures is an open problem.
Binary Weighted Memristive Analog Deep Neural Network for Near-Sensor Edge Processing
The memristive crossbar aims to implement analog weighted neural network, however, the realistic implementation of such crossbar arrays is not possible due to limited switching states of memristive devices.
Approximate Probabilistic Neural Networks with Gated Threshold Logic
Probabilistic Neural Network (PNN) is a feed-forward artificial neural network developed for solving classification problems.
Neuro-memristive Circuits for Edge Computing: A review
The volume, veracity, variability, and velocity of data produced from the ever-increasing network of sensors connected to Internet pose challenges for power management, scalability, and sustainability of cloud computing infrastructure.
Hierarchical Temporal Memory using Memristor Networks: A Survey
This paper presents a survey of the currently available hardware designs for implementation of the human cortex inspired algorithm, Hierarchical Temporal Memory (HTM).
Hardware Architecture Emerging Technologies
Feature extraction without learning in an analog Spatial Pooler memristive-CMOS circuit design of Hierarchical Temporal Memory
Hierarchical Temporal Memory (HTM) is a neuromorphic algorithm that emulates sparsity, hierarchy and modularity resembling the working principles of neocortex.
Facial emotion recognition using min-max similarity classifier
In spite of the progress achieved in facial emotion recognition in recent years, the effective and computationally simple feature selection and classification technique for emotion recognition is still an open problem.
On-chip Face Recognition System Design with Memristive Hierarchical Temporal Memory
Hierarchical Temporal Memory is a new machine learning algorithm intended to mimic the working principle of neocortex, part of the human brain, which is responsible for learning, classification, and making predictions.
Emerging Technologies
