Ferroelectric MirrorBit-Integrated Field-Programmable Memory Array for TCAM, Storage, and In-Memory Computing Applications

no code implementations • 10 Jul 2023 • Paritosh Meihar, Rowtu Srinu, Sandip Lashkare, Ajay Kumar Singh, Halid Mulaosmanovic, Veeresh Deshpande, Stefan Dünkel, Sven Beyer, Udayan Ganguly

We show the conventional 1-Bit FeFET, the MirrorBit, and MirrorBit-based Ternary Content-addressable memory (MCAM or MirrorBit-based TCAM) within the same field-programmable array.

Computational Efficiency

FeFET-based MirrorBit cell for High-density NVM storage

no code implementations • 6 Apr 2023 • Paritosh Meihar, Rowtu Srinu, Vivek Saraswat, Sandip Lashkare, Halid Mulaosmanovic, Ajay Kumar Singh, Stefan Dünkel, Sven Beyer, Udayan Ganguly

A TCAD simulation is also presented to explain the origin and working of MirrorBit states based on the FeFET model calibrated using the GlobalFoundries FeFET device.

Vocal Bursts Intensity Prediction

A case for multiple and parallel RRAMs as synaptic model for training SNNs

no code implementations • 13 Mar 2018 • Aditya Shukla, Sidharth Prasad, Sandip Lashkare, Udayan Ganguly

As a solution, we propose the use of multiple PCMO-RRAMs in parallel within a synapse.

A simple and efficient SNN and its performance & robustness evaluation method to enable hardware implementation

no code implementations • 7 Dec 2016 • Anmol Biswas, Sidharth Prasad, Sandip Lashkare, Udayan Ganguly

Second, we develop a computationally efficient (15000 x) and accurate (correlation of 0. 98) method to evaluate the performance of the network without standard recognition tests.

General Classification