Search Results for author: Shahin Nazarian

Found 14 papers, 3 papers with code

Leveraging Reinforcement Learning and Large Language Models for Code Optimization

no code implementations9 Dec 2023 Shukai Duan, Nikos Kanakaris, Xiongye Xiao, Heng Ping, Chenyu Zhou, Nesreen K. Ahmed, Guixiang Ma, Mihai Capota, Theodore L. Willke, Shahin Nazarian, Paul Bogdan

We compare our framework with existing state-of-the-art models and show that it is more efficient with respect to speed and computational usage, as a result of the decrement in training steps and its applicability to models with fewer parameters.

Language Modelling reinforcement-learning +1

Leader-Follower Neural Networks with Local Error Signals Inspired by Complex Collectives

no code implementations11 Oct 2023 Chenzhong Yin, Mingxi Cheng, Xiongye Xiao, Xinghe Chen, Shahin Nazarian, Andrei Irimia, Paul Bogdan

Motivated by the intricacy of these collectives, we propose a neural network (NN) architecture inspired by the rules observed in nature's collective ensembles.

End-to-end Mapping in Heterogeneous Systems Using Graph Representation Learning

no code implementations25 Apr 2022 Yao Xiao, Guixiang Ma, Nesreen K. Ahmed, Mihai Capota, Theodore Willke, Shahin Nazarian, Paul Bogdan

To enable heterogeneous computing systems with autonomous programming and optimization capabilities, we propose a unified, end-to-end, programmable graph representation learning (PGL) framework that is capable of mining the complexity of high-level programs down to the universal intermediate representation, extracting the specific computational patterns and predicting which code segments would run best on a specific core in heterogeneous hardware platforms.

Graph Representation Learning

Trust-aware Control for Intelligent Transportation Systems

no code implementations8 Nov 2021 Mingxi Cheng, Junyao Zhang, Shahin Nazarian, Jyotirmoy Deshmukh, Paul Bogdan

Many intelligent transportation systems are multi-agent systems, i. e., both the traffic participants and the subsystems within the transportation infrastructure can be modeled as interacting agents.

Management

VRoC: Variational Autoencoder-aided Multi-task Rumor Classifier Based on Text

1 code implementation28 Jan 2021 Mingxi Cheng, Shahin Nazarian, Paul Bogdan

VRoC consists of a co-train engine that trains variational autoencoders (VAEs) and rumor classification components.

General Classification

A Vertex Cut based Framework for Load Balancing and Parallelism Optimization in Multi-core Systems

no code implementations9 Oct 2020 Guixiang Ma, Yao Xiao, Theodore L. Willke, Nesreen K. Ahmed, Shahin Nazarian, Paul Bogdan

High-level applications, such as machine learning, are evolving from simple models based on multilayer perceptrons for simple image recognition to much deeper and more complex neural networks for self-driving vehicle control systems. The rapid increase in the consumption of memory and computational resources by these models demands the use of multi-core parallel systems to scale the execution of the complex emerging applications that depend on them.

Deep-PowerX: A Deep Learning-Based Framework for Low-Power Approximate Logic Synthesis

1 code implementation3 Jul 2020 Ghasem Pasandi, Mackenzie Peterson, Moises Herrera, Shahin Nazarian, Massoud Pedram

This paper aims at integrating three powerful techniques namely Deep Learning, Approximate Computing, and Low Power Design into a strategy to optimize logic at the synthesis level.

CSM-NN: Current Source Model Based Logic Circuit Simulation -- A Neural Network Approach

no code implementations13 Feb 2020 Mohammad Saeed Abrishami, Massoud Pedram, Shahin Nazarian

The miniaturization of transistors down to 5nm and beyond, plus the increasing complexity of integrated circuits, significantly aggravate short channel effects, and demand analysis and optimization of more design corners and modes.

NN-PARS: A Parallelized Neural Network Based Circuit Simulation Framework

no code implementations13 Feb 2020 Mohammad Saeed Abrishami, Hao Ge, Justin F. Calderon, Massoud Pedram, Shahin Nazarian

The shrinking of transistor geometries as well as the increasing complexity of integrated circuits, significantly aggravate nonlinear design behavior.

Scheduling

Efficient Training of Deep Convolutional Neural Networks by Augmentation in Embedding Space

no code implementations12 Feb 2020 Mohammad Saeed Abrishami, Amir Erfan Eshratifar, David Eigen, Yanzhi Wang, Shahin Nazarian, Massoud Pedram

However, fine-tuning a transfer model with data augmentation in the raw input space has a high computational cost to run the full network for every augmented input.

Data Augmentation Transfer Learning

Approximate Logic Synthesis: A Reinforcement Learning-Based Technology Mapping Approach

no code implementations1 Feb 2019 Ghasem Pasandi, Shahin Nazarian, Massoud Pedram

Approximate Logic Synthesis (ALS) is the process of synthesizing and mapping a given Boolean network to a library of logic cells so that the magnitude/rate of error between outputs of the approximate and initial (exact) Boolean netlists is bounded from above by a predetermined total error threshold.

Hardware Architecture

High-Performance FPGA Implementation of Equivariant Adaptive Separation via Independence Algorithm for Independent Component Analysis

no code implementations6 Jul 2017 Mahdi Nazemi, Shahin Nazarian, Massoud Pedram

Independent Component Analysis (ICA) is a dimensionality reduction technique that can boost efficiency of machine learning models that deal with probability density functions, e. g. Bayesian neural networks.

BIG-bench Machine Learning Dimensionality Reduction

Cannot find the paper you are looking for? You can Submit a new open access paper.