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Found 5 papers, 1 papers with code
An Open-Source ML-Based Full-Stack Optimization Framework for Machine Learning Accelerators
Parameterizable machine learning (ML) accelerators are the product of recent breakthroughs in ML.
Performance Analysis of DNN Inference/Training with Convolution and non-Convolution Operations
The modeling effort of SimDIT comprehensively covers convolution and non-convolution operations of both CNN inference and training on a highly parameterizable hardware substrate.
Accelerating Attention through Gradient-Based Learned Runtime Pruning
To best utilize this mathematical innovation, we devise a bit-serial architecture, dubbed LeOPArd, for transformer language models with bit-level early termination microarchitectural mechanism.
Bit-Parallel Vector Composability for Neural Acceleration
This paper explores a different design style, where each unit is only responsible for a slice of the bit-level operations to interleave and combine the benefits of bit-level parallelism with the abundant data-level parallelism in deep neural networks.
Mixed-Signal Charge-Domain Acceleration of Deep Neural networks through Interleaved Bit-Partitioned Arithmetic
Low-power potential of mixed-signal design makes it an alluring option to accelerate Deep Neural Networks (DNNs).
Hardware Architecture
