Accuracy and Resiliency of Analog Compute-in-Memory Inference Engines

no code implementations • 5 Aug 2020 • Zhe Wan, Tianyi Wang, Yiming Zhou, Subramanian S. Iyer, Vwani P. Roychowdhury

To explore this critical issue of scalability, this paper first presents a simulation framework to evaluate the feasibility of large-scale DNNs based on CIM architecture and analog NVM.

An Analog Neural Network Computing Engine using CMOS-Compatible Charge-Trap-Transistor (CTT)

no code implementations • 19 Sep 2017 • Yuan Du, Li Du, Xuefeng Gu, Jieqiong Du, X. Shawn Wang, Boyu Hu, Mingzhe Jiang, Xiaoliang Chen, Junjie Su, Subramanian S. Iyer, Mau-Chung Frank Chang

The proposed computing engine is composed of a scalable CTT multiplier array and energy efficient analog-digital interfaces.