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Found 8 papers, 1 papers with code
GNNavigator: Towards Adaptive Training of Graph Neural Networks via Automatic Guideline Exploration
Graph Neural Networks (GNNs) succeed significantly in many applications recently.
Graph Neural Networks Automated Design and Deployment on Device-Edge Co-Inference Systems
GCoDE abstracts the device communication process into an explicit operation and fuses the search of architecture and the operations mapping in a unified space for joint-optimization.
DDC-PIM: Efficient Algorithm/Architecture Co-design for Doubling Data Capacity of SRAM-based Processing-In-Memory
Processing-in-memory (PIM), as a novel computing paradigm, provides significant performance benefits from the aspect of effective data movement reduction.
Architectural Implications of GNN Aggregation Programming Abstractions
Graph neural networks (GNNs) have gained significant popularity due to the powerful capability to extract useful representations from graph data.
Hardware-Aware Graph Neural Network Automated Design for Edge Computing Platforms
Moreover, HGNAS achieves hardware awareness during the GNN architecture design by leveraging a hardware performance predictor, which could balance the GNN model accuracy and efficiency corresponding to the characteristics of targeted devices.
Eventor: An Efficient Event-Based Monocular Multi-View Stereo Accelerator on FPGA Platform
In this paper, Eventor is proposed as a fast and efficient EMVS accelerator by realizing the most critical and time-consuming stages including event back-projection and volumetric ray-counting on FPGA.
Optimizing Memory Efficiency of Graph Neural Networks on Edge Computing Platforms
Graph neural networks (GNN) have achieved state-of-the-art performance on various industrial tasks.
Accelerating CNN Training by Pruning Activation Gradients
Sparsification is an efficient approach to accelerate CNN inference, but it is challenging to take advantage of sparsity in training procedure because the involved gradients are dynamically changed.
