A Design Methodology for Efficient Implementation of Deconvolutional Neural Networks on an FPGA

7 May 2017Xinyu ZhangSrinjoy DasOjash NeopaneKen Kreutz-Delgado

In recent years deep learning algorithms have shown extremely high performance on machine learning tasks such as image classification and speech recognition. In support of such applications, various FPGA accelerator architectures have been proposed for convolutional neural networks (CNNs) that enable high performance for classification tasks at lower power than CPU and GPU processors... (read more)

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