DRACO: Co-Optimizing Hardware Utilization, and Performance of DNNs on Systolic Accelerator

26 Jun 2020Nandan Kumar JhaShreyas RavishankarSparsh MittalArvind KaushikDipan MandalMahesh Chandra

The number of processing elements (PEs) in a fixed-sized systolic accelerator is well matched for large and compute-bound DNNs; whereas, memory-bound DNNs suffer from PE underutilization and fail to achieve peak performance and energy efficiency. To mitigate this, specialized dataflow and/or micro-architectural techniques have been proposed... (read more)

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