Search Results for author: Arindam Basu

Found 35 papers, 4 papers with code

Hybrid Event-Frame Neural Spike Detector for Neuromorphic Implantable BMI

no code implementations14 May 2024 Vivek Mohan, Wee Peng Tay, Arindam Basu

This work introduces two novel neural spike detection schemes intended for use in next-generation neuromorphic brain-machine interfaces (iBMIs).

A Low-Power Spike Detector Using In-Memory Computing for Event-based Neural Frontend

no code implementations14 May 2024 Ye Ke, Arindam Basu

With the sensor scaling of next-generation Brain-Machine Interface (BMI) systems, the massive A/D conversion and analog multiplexing at the neural frontend poses a challenge in terms of power and data rates for wireless and implantable BMIs.

Memory Efficient Corner Detection for Event-driven Dynamic Vision Sensors

no code implementations18 Jan 2024 Pao-Sheng Vincent Sun, Arren Glover, Chiara Bartolozzi, Arindam Basu

In this paper, we propose a new event-driven corner detection implementation tailored for edge computing devices, which requires much lower memory access than luvHarris while also improving accuracy.

Data Compression Edge-computing

ANN vs SNN: A case study for Neural Decoding in Implantable Brain-Machine Interfaces

no code implementations26 Dec 2023 Biyan Zhou, Pao-Sheng Vincent Sun, Arindam Basu

While it is important to make implantable brain-machine interfaces (iBMI) wireless to increase patient comfort and safety, the trend of increased channel count in recent neural probes poses a challenge due to the concomitant increase in the data rate.

Decoder Edge-computing

Towards Neuromorphic Compression based Neural Sensing for Next-Generation Wireless Implantable Brain Machine Interface

no code implementations15 Dec 2023 Vivek Mohan, Wee Peng Tay, Arindam Basu

Furthermore, we use accuracy, sensitivity, and false detection rate to understand the effect of compression on downstream iBMI tasks, specifically, spike detection.

Data Compression

An Efficient Hash-based Data Structure for Dynamic Vision Sensors and its Application to Low-energy Low-memory Noise Filtering

no code implementations28 Apr 2023 Pradeep Kumar Gopalakrishnan, Chip-Hong Chang, Arindam Basu

Events generated by the Dynamic Vision Sensor (DVS) are generally stored and processed in two-dimensional data structures whose memory complexity and energy-per-event scale proportionately with increasing sensor dimensions.

NeuroBench: A Framework for Benchmarking Neuromorphic Computing Algorithms and Systems

1 code implementation10 Apr 2023 Jason Yik, Korneel Van den Berghe, Douwe den Blanken, Younes Bouhadjar, Maxime Fabre, Paul Hueber, Denis Kleyko, Noah Pacik-Nelson, Pao-Sheng Vincent Sun, Guangzhi Tang, Shenqi Wang, Biyan Zhou, Soikat Hasan Ahmed, George Vathakkattil Joseph, Benedetto Leto, Aurora Micheli, Anurag Kumar Mishra, Gregor Lenz, Tao Sun, Zergham Ahmed, Mahmoud Akl, Brian Anderson, Andreas G. Andreou, Chiara Bartolozzi, Arindam Basu, Petrut Bogdan, Sander Bohte, Sonia Buckley, Gert Cauwenberghs, Elisabetta Chicca, Federico Corradi, Guido de Croon, Andreea Danielescu, Anurag Daram, Mike Davies, Yigit Demirag, Jason Eshraghian, Tobias Fischer, Jeremy Forest, Vittorio Fra, Steve Furber, P. Michael Furlong, William Gilpin, Aditya Gilra, Hector A. Gonzalez, Giacomo Indiveri, Siddharth Joshi, Vedant Karia, Lyes Khacef, James C. Knight, Laura Kriener, Rajkumar Kubendran, Dhireesha Kudithipudi, Yao-Hong Liu, Shih-Chii Liu, Haoyuan Ma, Rajit Manohar, Josep Maria Margarit-Taulé, Christian Mayr, Konstantinos Michmizos, Dylan Muir, Emre Neftci, Thomas Nowotny, Fabrizio Ottati, Ayca Ozcelikkale, Priyadarshini Panda, Jongkil Park, Melika Payvand, Christian Pehle, Mihai A. Petrovici, Alessandro Pierro, Christoph Posch, Alpha Renner, Yulia Sandamirskaya, Clemens JS Schaefer, André van Schaik, Johannes Schemmel, Samuel Schmidgall, Catherine Schuman, Jae-sun Seo, Sadique Sheik, Sumit Bam Shrestha, Manolis Sifalakis, Amos Sironi, Matthew Stewart, Kenneth Stewart, Terrence C. Stewart, Philipp Stratmann, Jonathan Timcheck, Nergis Tömen, Gianvito Urgese, Marian Verhelst, Craig M. Vineyard, Bernhard Vogginger, Amirreza Yousefzadeh, Fatima Tuz Zohora, Charlotte Frenkel, Vijay Janapa Reddi

The NeuroBench framework introduces a common set of tools and systematic methodology for inclusive benchmark measurement, delivering an objective reference framework for quantifying neuromorphic approaches in both hardware-independent (algorithm track) and hardware-dependent (system track) settings.


Tracking Fast by Learning Slow: An Event-based Speed Adaptive Hand Tracker Leveraging Knowledge in RGB Domain

no code implementations28 Feb 2023 Chuanlin Lan, Ziyuan Yin, Arindam Basu, Rosa H. M. Chan

To realize our solution, we constructed the first 3D hand tracking dataset captured by an event camera in a real-world environment, figured out two data augment methods to narrow the domain gap between slow and fast motion data, developed a speed adaptive event stream segmentation method to handle hand movements in different moving speeds, and introduced a new event-to-frame representation method adaptive to event streams with different lengths.

Intelligence Processing Units Accelerate Neuromorphic Learning

1 code implementation19 Nov 2022 Pao-Sheng Vincent Sun, Alexander Titterton, Anjlee Gopiani, Tim Santos, Arindam Basu, Wei D. Lu, Jason K. Eshraghian

Spiking neural networks (SNNs) have achieved orders of magnitude improvement in terms of energy consumption and latency when performing inference with deep learning workloads.

Spiking Neural Network Integrated Circuits: A Review of Trends and Future Directions

no code implementations14 Mar 2022 Arindam Basu, Charlotte Frenkel, Lei Deng, Xueyong Zhang

In this paper, we reviewed Spiking neural network (SNN) integrated circuit designs and analyzed the trends among mixed-signal cores, fully digital cores and large-scale, multi-core designs.

A 51.3 TOPS/W, 134.4 GOPS In-memory Binary Image Filtering in 65nm CMOS

no code implementations25 Jul 2021 Sumon Kumar Bose, Deepak Singla, Arindam Basu

As compared to fully digital implementation, IMF enables > 70x energy savings and a > 3x improvement of processing time when tested with the video recordings from a DAVIS sensor and achieves a peak throughput of 134. 4 GOPS.

Image Denoising Object Recognition

Prospects for Analog Circuits in Deep Networks

no code implementations23 Jun 2021 Shih-Chii Liu, John Paul Strachan, Arindam Basu

Emerging dense non-volatile memory technologies can help to provide on-chip memory and analog circuits can be well suited to implement the needed multiplication-vector operations coupled with in-computing memory approaches.

BIG-bench Machine Learning

A $0.11-0.38$ pJ/cycle Differential Ring Oscillator in $65$ nm CMOS for Robust Neurocomputing

no code implementations2 Nov 2020 Xueyong Zhang, Jyotibdha Acharya, Arindam Basu

This paper presents a low-area and low-power consumption CMOS differential current controlled oscillator (CCO) for neuromorphic applications.

ADIC: Anomaly Detection Integrated Circuit in 65nm CMOS utilizing Approximate Computing

no code implementations21 Aug 2020 Bapi Kar, Pradeep Kumar Gopalakrishnan, Sumon Kumar Bose, Mohendra Roy, Arindam Basu

An additional 42% energy saving can be achieved when a lighter version of OPIUM method is used for training with the same number of data samples lead to no significant compromise on the quality of inference.

Anomaly Detection One-class classifier

A Hybrid Neuromorphic Object Tracking and Classification Framework for Real-time Systems

1 code implementation21 Jul 2020 Andres Ussa, Chockalingam Senthil Rajen, Deepak Singla, Jyotibdha Acharya, Gideon Fu Chuanrong, Arindam Basu, Bharath Ramesh

Deep learning inference that needs to largely take place on the 'edge' is a highly computational and memory intensive workload, making it intractable for low-power, embedded platforms such as mobile nodes and remote security applications.

General Classification Object +2

EBBINNOT: A Hardware Efficient Hybrid Event-Frame Tracker for Stationary Dynamic Vision Sensors

no code implementations31 May 2020 Vivek Mohan, Deepak Singla, Tarun Pulluri, Andres Ussa, Pradeep Kumar Gopalakrishnan, Pao-Sheng Sun, Bharath Ramesh, Arindam Basu

To the best of our knowledge, this is the first time a stationary DVS based traffic monitoring solution is extensively compared to simultaneously recorded RGB frame-based methods while showing tremendous promise by outperforming state-of-the-art deep learning solutions.

Region Proposal

Deep Neural Network for Respiratory Sound Classification in Wearable Devices Enabled by Patient Specific Model Tuning

1 code implementation16 Apr 2020 Jyotibdha Acharya, Arindam Basu

We also implement a patient specific model tuning strategy that first screens respiratory patients and then builds patient specific classification models using limited patient data for reliable anomaly detection.

Anomaly Detection General Classification +2

Is my Neural Network Neuromorphic? Taxonomy, Recent Trends and Future Directions in Neuromorphic Engineering

no code implementations27 Feb 2020 Sumon Kumar Bose, Jyotibdha Acharya, Arindam Basu

In this paper, we review recent work published over the last 3 years under the umbrella of Neuromorphic engineering to analyze what are the common features among such systems.

EBBIOT: A Low-complexity Tracking Algorithm for Surveillance in IoVT Using Stationary Neuromorphic Vision Sensors

no code implementations4 Oct 2019 Jyotibdha Acharya, Andres Ussa Caycedo, Vandana Reddy Padala, Rishi Raj Sidhu Singh, Garrick Orchard, Bharath Ramesh, Arindam Basu

In this paper, we present EBBIOT-a novel paradigm for object tracking using stationary neuromorphic vision sensors in low-power sensor nodes for the Internet of Video Things (IoVT).

Object Tracking

Spiking Neural Network based Region Proposal Networks for Neuromorphic Vision Sensors

no code implementations26 Feb 2019 Jyotibdha Acharya, Vandana Padala, Arindam Basu

This paper presents a three layer spiking neural network based region proposal network operating on data generated by neuromorphic vision sensors.

Clustering Region Proposal

Power efficient Spiking Neural Network Classifier based on memristive crossbar network for spike sorting application

no code implementations25 Feb 2018 Anand Kumar Mukhopadhyay, Indrajit Chakrabarti, Arindam Basu, Mrigank Sharad

The advantage of the former classifier is that it is power efficient while providing comparable accuracy as that of the digital implementation due to the robustness of the SNN training algorithm which has a good tolerance for variation in memristance.

General Classification Spike Sorting

VLSI Extreme Learning Machine: A Design Space Exploration

no code implementations3 May 2016 Enyi Yao, Arindam Basu

In this paper, we describe a compact low-power, high performance hardware implementation of the extreme learning machine (ELM) for machine learning applications.

General Classification

An Online Structural Plasticity Rule for Generating Better Reservoirs

no code implementations19 Apr 2016 Subhrajit Roy, Arindam Basu

The proposed learning rule is inspired from structural plasticity and trains the liquid through formation and elimination of synaptic connections.

An Online Unsupervised Structural Plasticity Algorithm for Spiking Neural Networks

no code implementations4 Dec 2015 Subhrajit Roy, Arindam Basu

To demonstrate the performance of the proposed network and learning rule, we employ it to solve two, four and six class classification of random Poisson spike time inputs.

General Classification Specificity

Triplet Spike Time Dependent Plasticity: A floating-gate Implementation

no code implementations3 Dec 2015 Roshan Gopalakrishnan, Arindam Basu

Synapse plays an important role of learning in a neural network; the learning rules which modify the synaptic strength based on the timing difference between the pre- and post-synaptic spike occurrence is termed as Spike Time Dependent Plasticity (STDP).

A 128 channel Extreme Learning Machine based Neural Decoder for Brain Machine Interfaces

no code implementations22 Sep 2015 Yi Chen, Enyi Yao, Arindam Basu

The chip is verified with neural data recorded in monkey finger movements experiment, achieving a decoding accuracy of 99. 3% for movement type.

Decoder General Classification

Learning Spike time codes through Morphological Learning with Binary Synapses

no code implementations17 Jun 2015 Subhrajit Roy, Phyo Phyo San, Shaista Hussain, Lee Wang Wei, Arindam Basu

In this paper, a neuron with nonlinear dendrites (NNLD) and binary synapses that is able to learn temporal features of spike input patterns is considered.

Liquid State Machine with Dendritically Enhanced Readout for Low-power, Neuromorphic VLSI Implementations

no code implementations20 Nov 2014 Subhrajit Roy, Amitava Banerjee, Arindam Basu

Compared to the parallel perceptron architecture trained by the p-delta algorithm, which is the state of the art in terms of performance of readout stages, our readout architecture and learning algorithm can attain better performance with significantly less synaptic resources making it attractive for VLSI implementation.

Delay Learning Architectures for Memory and Classification

no code implementations6 Nov 2013 Shaista Hussain, Arindam Basu, R. Wang, Tara Julia Hamilton

We present a neuromorphic spiking neural network, the DELTRON, that can remember and store patterns by changing the delays of every connection as opposed to modifying the weights.

Classification General Classification

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