Multi-Mode Inference Engine for Convolutional Neural Networks

no code implementations • 11 Dec 2017 • Arash Ardakani, Carlo Condo, Warren J. Gross

Their performance efficiency is limited to less than 55% on average, which leads to unnecessarily high processing latency and silicon area.

Hardware Architecture

Sparsely-Connected Neural Networks: Towards Efficient VLSI Implementation of Deep Neural Networks

no code implementations • 4 Nov 2016 • Arash Ardakani, Carlo Condo, Warren J. Gross

The proposed architecture can save up to 90% of memory compared to the conventional implementations of fully-connected neural networks.