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Found 6 papers, 1 papers with code
LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits
To this end, we introduce LaMAGIC, a pioneering language model-based topology generation model that leverages supervised finetuning for automated analog circuit design.
PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions
Based on the formulation, we propose PANDA, an innovative architecture-level solution that combines the advantages of analytical and ML power models.
EDALearn: A Comprehensive RTL-to-Signoff EDA Benchmark for Democratized and Reproducible ML for EDA Research
The application of Machine Learning (ML) in Electronic Design Automation (EDA) for Very Large-Scale Integration (VLSI) design has garnered significant research attention.
Towards Collaborative Intelligence: Routability Estimation based on Decentralized Private Data
To further strengthen the results, we co-design a customized ML model FLNet and its personalization under the decentralized training scenario.
The Dark Side: Security Concerns in Machine Learning for EDA
The growing IC complexity has led to a compelling need for design efficiency improvement through new electronic design automation (EDA) methodologies.
Automatic Routability Predictor Development Using Neural Architecture Search
The rise of machine learning technology inspires a boom of its applications in electronic design automation (EDA) and helps improve the degree of automation in chip designs.
