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Found 14 papers, 8 papers with code
Accelerating Deterministic and Stochastic Binarized Neural Networks on FPGAs Using OpenCL
Consequently, the performance and complexity of Artificial Neural Networks (ANNs) is burgeoning.
Variation-aware Binarized Memristive Networks
Moreover, we introduce means to mitigate the adverse effect of memristive variations in our proposed networks.
Training Progressively Binarizing Deep Networks Using FPGAs
While hardware implementations of inference routines for Binarized Neural Networks (BNNs) are plentiful, current realizations of efficient BNN hardware training accelerators, suitable for Internet of Things (IoT) edge devices, leave much to be desired.
MemTorch: An Open-source Simulation Framework for Memristive Deep Learning Systems
Memristive devices have shown great promise to facilitate the acceleration and improve the power efficiency of Deep Learning (DL) systems.
Emerging Technologies
Hardware Implementation of Deep Network Accelerators Towards Healthcare and Biomedical Applications
The advent of dedicated Deep Learning (DL) accelerators and neuromorphic processors has brought on new opportunities for applying both Deep and Spiking Neural Network (SNN) algorithms to healthcare and biomedical applications at the edge.
Memristive Stochastic Computing for Deep Learning Parameter Optimization
Stochastic Computing (SC) is a computing paradigm that allows for the low-cost and low-power computation of various arithmetic operations using stochastic bit streams and digital logic.
A Deep Learning Localization Method for Measuring Abdominal Muscle Dimensions in Ultrasound Images
US images can be used to measure abdominal muscles dimensions for the diagnosis and creation of customized treatment plans for patients with Low Back Pain (LBP), however, they are difficult to interpret.
Design Space Exploration of Dense and Sparse Mapping Schemes for RRAM Architectures
The impact of device and circuit-level effects in mixed-signal Resistive Random Access Memory (RRAM) accelerators typically manifest as performance degradation of Deep Learning (DL) algorithms, but the degree of impact varies based on algorithmic features.
Navigating Local Minima in Quantized Spiking Neural Networks
Spiking and Quantized Neural Networks (NNs) are becoming exceedingly important for hyper-efficient implementations of Deep Learning (DL) algorithms.
Toward A Formalized Approach for Spike Sorting Algorithms and Hardware Evaluation
Spike sorting algorithms are used to separate extracellular recordings of neuronal populations into single-unit spike activities.
Seizure Detection and Prediction by Parallel Memristive Convolutional Neural Networks
During the past two decades, epileptic seizure detection and prediction algorithms have evolved rapidly.
AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computing
Digital processors based on typical von Neumann architectures are not conducive to edge AI given the large amounts of required data movement in and out of memory.
Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference
In this tutorial, we provide a deep dive into how such adaptations can be achieved and evaluated using the recently released IBM Analog Hardware Acceleration Kit (AIHWKit), freely available at https://github. com/IBM/aihwkit.
A Precision-Optimized Fixed-Point Near-Memory Digital Processing Unit for Analog In-Memory Computing
Analog In-Memory Computing (AIMC) is an emerging technology for fast and energy-efficient Deep Learning (DL) inference.
