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Found 4 papers, 1 papers with code
A Block Minifloat Representation for Training Deep Neural Networks
Training Deep Neural Networks (DNN) with high efficiency can be difficult to achieve with native floating point representations and commercially available hardware.
MajorityNets: BNNs Utilising Approximate Popcount for Improved Efficiency
Binarized neural networks (BNNs) have shown exciting potential for utilising neural networks in embedded implementations where area, energy and latency constraints are paramount.
AddNet: Deep Neural Networks Using FPGA-Optimized Multipliers
Low-precision arithmetic operations to accelerate deep-learning applications on field-programmable gate arrays (FPGAs) have been studied extensively, because they offer the potential to save silicon area or increase throughput.
Unrolling Ternary Neural Networks
The computational complexity of neural networks for large scale or real-time applications necessitates hardware acceleration.
