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Found 4 papers, 0 papers with code
MINIMALIST: switched-capacitor circuits for efficient in-memory computation of gated recurrent units
We introduce a streamlined and hardware-compatible architecture based on minimal gated recurrent units (GRUs), and an accompanying efficient mixed-signal hardware implementation of the model.
The Role of Temporal Hierarchy in Spiking Neural Networks
The temporal dynamics such as time constants of the synapses and neurons and delays have been recently shown to have computational benefits that help reduce the overall number of parameters required in the network and increase the accuracy of the SNNs in solving temporal tasks.
Synaptic metaplasticity with multi-level memristive devices
In this work, we extend this solution to quantized neural networks (QNNs) and present a memristor-based hardware solution for implementing metaplasticity during both inference and training.
Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks
In this work, we assessed the performance and variability of RRAM-based neuromorphic circuits that were designed and fabricated using a 130\, nm technology node.
