no code implementations • 13 May 2025 • Sebastian Billaudelle, Laura Kriener, Filippo Moro, Tristan Torchet, Melika Payvand
We introduce a streamlined and hardware-compatible architecture based on minimal gated recurrent units (GRUs), and an accompanying efficient mixed-signal hardware implementation of the model.
no code implementations • 26 Jul 2024 • Filippo Moro, Pau Vilimelis Aceituno, Laura Kriener, Melika Payvand
The temporal dynamics such as time constants of the synapses and neurons and delays have been recently shown to have computational benefits that help reduce the overall number of parameters required in the network and increase the accuracy of the SNNs in solving temporal tasks.
no code implementations • 21 Jun 2023 • Simone D'Agostino, Filippo Moro, Tifenn Hirtzlin, Julien Arcamone, Niccolò Castellani, Damien Querlioz, Melika Payvand, Elisa Vianello
In this work, we extend this solution to quantized neural networks (QNNs) and present a memristor-based hardware solution for implementing metaplasticity during both inference and training.
no code implementations • 10 Feb 2022 • Filippo Moro, E. Esmanhotto, T. Hirtzlin, N. Castellani, A. Trabelsi, T. Dalgaty, G. Molas, F. Andrieu, S. Brivio, S. Spiga, G. Indiveri, M. Payvand, E. Vianello
In this work, we assessed the performance and variability of RRAM-based neuromorphic circuits that were designed and fabricated using a 130\, nm technology node.