no code implementations • 2 Sep 2024 • Guanglei Zhou, Bhargav Korrapati, Gaurav Rajavendra Reddy, Jiang Hu, Yiran Chen, Dipto G. Thakurta
Generation of VLSI layout patterns is essential for a wide range of Design For Manufacturability (DFM) studies.
1 code implementation • 14 Dec 2023 • Qijun Zhang, Shiyu Li, Guanglei Zhou, Jingyu Pan, Chen-Chia Chang, Yiran Chen, Zhiyao Xie
Based on the formulation, we propose PANDA, an innovative architecture-level solution that combines the advantages of analytical and ML power models.