1 code implementation • 5 Nov 2024 • Hanqing Zhu, Wenyan Cong, Guojin Chen, Shupeng Ning, Ray T. Chen, Jiaqi Gu, David Z. Pan
In this work, we boost the prediction fidelity to an unprecedented level for simulating complex photonic devices with a novel operator design driven by the above challenges.
no code implementations • 23 Aug 2024 • Guojin Chen, HaoYu Yang, Bei Yu, Haoxing Ren
Advancements in chip design and manufacturing have enabled the processing of complex tasks such as deep learning and natural language processing, paving the way for the development of artificial general intelligence (AGI).
no code implementations • 16 Aug 2024 • Guojin Chen, HaoYu Yang, Haoxing Ren, Bei Yu, David Z. Pan
Optical proximity correction (OPC) is crucial for pushing the boundaries of semiconductor manufacturing and enabling the continued scaling of integrated circuits.
1 code implementation • 7 Jun 2024 • Guojin Chen, Keren Zhu, Seunggeun Kim, Hanqing Zhu, Yao Lai, Bei Yu, David Z. Pan
Analog layout synthesis faces significant challenges due to its dependence on manual processes, considerable time requirements, and performance instability.
1 code implementation • 23 May 2024 • Yao Lai, Sungyoung Lee, Guojin Chen, Souradip Poddar, Mengkang Hu, David Z. Pan, Ping Luo
Analog circuit design is a significant task in modern chip technology, focusing on the selection of component types, connectivity, and parameters to ensure proper circuit functionality.
no code implementations • 25 Mar 2023 • Guojin Chen, HaoYu Yang, Bei Yu
Multiple patterning lithography (MPL) is regarded as one of the most promising ways of overcoming the resolution limitations of conventional optical lithography due to the delay of next-generation lithography technology.
no code implementations • 23 Mar 2023 • Zixiao Wang, Yunheng Shen, Wenqian Zhao, Yang Bai, Guojin Chen, Farzan Farnia, Bei Yu
Deep generative models dominate the existing literature in layout pattern generation.
no code implementations • 18 Mar 2023 • Guojin Chen, Ziyang Yu, Hongduo Liu, Yuzhe ma, Bei Yu
To further enhance printability and fast iterative convergence, we propose a novel deep neural network delicately designed with level set intrinsic principles to facilitate the joint optimization of DNN and GPU accelerated level set optimizer.
no code implementations • 15 Mar 2023 • Guojin Chen, Zehua Pei, HaoYu Yang, Yuzhe ma, Bei Yu, Martin D. F. Wong
Lithography is fundamental to integrated circuit fabrication, necessitating large computation overhead.
no code implementations • 15 Mar 2023 • Wenqian Zhao, Xufeng Yao, Ziyang Yu, Guojin Chen, Yuzhe ma, Bei Yu, Martin D. F. Wong
We inspect the pattern distribution on a design layer and find that different sub-regions have different pattern complexity.