Search Results for author: Hanqiu Chen

Found 4 papers, 3 papers with code

HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond

1 code implementation1 May 2024 Stefan Abi-Karam, Rishov Sarkar, Allison Seigler, Sean Lowe, Zhigang Wei, Hanqiu Chen, Nanditha Rao, Lizy John, Aman Arora, Cong Hao

HLSFactory has three main stages: 1) a design space expansion stage to elaborate single HLS designs into large design spaces using various optimization directives across multiple vendor tools, 2) a design synthesis stage to execute HLS and FPGA tool flows concurrently across designs, and 3) a data aggregation stage for extracting standardized data into packaged datasets for ML usage.

Benchmarking Design Synthesis

Rapid-INR: Storage Efficient CPU-free DNN Training Using Implicit Neural Representation

1 code implementation29 Jun 2023 Hanqiu Chen, Hang Yang, Stephen Fitzmeyer, Cong Hao

This paper introduces Rapid-INR, a novel approach that utilizes INR for encoding and compressing images, thereby accelerating neural network training in computer vision tasks.

Image Classification Image Compression +1

DGNN-Booster: A Generic FPGA Accelerator Framework For Dynamic Graph Neural Network Inference

1 code implementation13 Apr 2023 Hanqiu Chen, Cong Hao

The experiment results demonstrate that DGNN-Booster can achieve a speedup of up to 5. 6x compared to the CPU baseline (6226R), 8. 4x compared to the GPU baseline (A6000) and 2. 1x compared to the FPGA baseline without applying optimizations proposed in this paper.

Bottleneck Analysis of Dynamic Graph Neural Network Inference on CPU and GPU

no code implementations8 Oct 2022 Hanqiu Chen, Yahya Alhinai, Yihan Jiang, Eunjee Na, Cong Hao

A variety of dynamic graph neural networks designed from algorithmic perspectives have succeeded in incorporating temporal information into graph processing.

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