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Found 2 papers, 1 papers with code
Mitigating Adversarial Attack for Compute-in-Memory Accelerator Utilizing On-chip Finetune
This makes the analog to digital converter (ADC) critical in CIM architectures.
DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Training
Our prior work (DNN+NeuroSim V1. 1) was developed to estimate the impact of reliability in synaptic devices, and analog-to-digital converter (ADC) quantization loss on the accuracy and hardware performance of inference engines.
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