Search Results for author: Hui-Ling Zhen

Found 26 papers, 8 papers with code

Unlocking Efficient Long-to-Short LLM Reasoning with Model Merging

1 code implementation26 Mar 2025 Han Wu, Yuxuan Yao, Shuqi Liu, Zehua Liu, Xiaojin Fu, Xiongwei Han, Xing Li, Hui-Ling Zhen, Tao Zhong, Mingxuan Yuan

Model merging, on the other hand, offers a cost-effective and robust alternative by integrating the quick-thinking capabilities of System 1 models with the methodical reasoning of System 2 models.

Prompt Engineering Reinforcement Learning (RL)

Certifying Language Model Robustness with Fuzzed Randomized Smoothing: An Efficient Defense Against Backdoor Attacks

no code implementations9 Feb 2025 Bowei He, Lihao Yin, Hui-Ling Zhen, Jianping Zhang, Lanqing Hong, Mingxuan Yuan, Chen Ma

The widespread deployment of pre-trained language models (PLMs) has exposed them to textual backdoor attacks, particularly those planted during the pre-training stage.

Language Modeling Language Modelling

CMoE: Fast Carving of Mixture-of-Experts for Efficient LLM Inference

1 code implementation6 Feb 2025 Zehua Pei, Lancheng Zou, Hui-Ling Zhen, Xianzhi Yu, Wulong Liu, Sinno Jialin Pan, Mingxuan Yuan, Bei Yu

Large language models (LLMs) achieve impressive performance by scaling model parameters, but this comes with significant inference overhead.

KVTuner: Sensitivity-Aware Layer-wise Mixed Precision KV Cache Quantization for Efficient and Nearly Lossless LLM Inference

1 code implementation6 Feb 2025 Xing Li, Zeyu Xing, Yiming Li, Linping Qu, Hui-Ling Zhen, Wulong Liu, Yiwu Yao, Sinno Jialin Pan, Mingxuan Yuan

KV cache quantization can improve Large Language Models (LLMs) inference throughput and latency in long contexts and large batch-size scenarios while preserving LLMs effectiveness.

Mathematical Reasoning Quantization

MixPE: Quantization and Hardware Co-design for Efficient LLM Inference

no code implementations25 Nov 2024 Yu Zhang, Mingzi Wang, Lancheng Zou, Wulong Liu, Hui-Ling Zhen, Mingxuan Yuan, Bei Yu

Transformer-based large language models (LLMs) have achieved remarkable success as model sizes continue to grow, yet their deployment remains challenging due to significant computational and memory demands.

Quantization

FuseGPT: Learnable Layers Fusion of Generative Pre-trained Transformers

1 code implementation21 Nov 2024 Zehua Pei, Hui-Ling Zhen, Xianzhi Yu, Sinno Jialin Pan, Mingxuan Yuan, Bei Yu

In this paper, we propose FuseGPT, a novel methodology to recycle the pruned transformer blocks to further recover the model performance.

The Graph's Apprentice: Teaching an LLM Low Level Knowledge for Circuit Quality Estimation

no code implementations30 Oct 2024 Reza Moravej, Saurabh Bodhe, Zhanguang Zhang, Didier Chetelat, Dimitrios Tsaras, Yingxue Zhang, Hui-Ling Zhen, Jianye Hao, Mingxuan Yuan

Logic synthesis is a crucial phase in the circuit design process, responsible for transforming hardware description language (HDL) designs into optimized netlists.

Knowledge Distillation

HardCore Generation: Generating Hard UNSAT Problems for Data Augmentation

no code implementations27 Sep 2024 Joseph Cotnareanu, Zhanguang Zhang, Hui-Ling Zhen, Yingxue Zhang, Mark Coates

In this paper we address both by identifying and manipulating the key contributors to a problem's ``hardness'', known as cores.

Data Augmentation Graph Neural Network

GraSS: Combining Graph Neural Networks with Expert Knowledge for SAT Solver Selection

no code implementations17 May 2024 Zhanguang Zhang, Didier Chetelat, Joseph Cotnareanu, Amur Ghose, Wenyi Xiao, Hui-Ling Zhen, Yingxue Zhang, Jianye Hao, Mark Coates, Mingxuan Yuan

In this paper we present GraSS, a novel approach for automatic SAT solver selection based on tripartite graph representations of instances and a heterogeneous graph neural network (GNN) model.

Graph Neural Network

DiLA: Enhancing LLM Tool Learning with Differential Logic Layer

no code implementations19 Feb 2024 Yu Zhang, Hui-Ling Zhen, Zehua Pei, Yingzhao Lian, Lihao Yin, Mingxuan Yuan, Bei Yu

In this paper, we propose a novel differential logic layer-aided language modeling (DiLA) approach, where logical constraints are integrated into the forward and backward passes of a network layer, to provide another option for LLM tool learning.

Language Modeling Language Modelling +1

BetterV: Controlled Verilog Generation with Discriminative Guidance

no code implementations3 Feb 2024 Zehua Pei, Hui-Ling Zhen, Mingxuan Yuan, Yu Huang, Bei Yu

In this work, we propose a Verilog generation framework, BetterV, which fine-tunes the large language models (LLMs) on processed domain-specific datasets and incorporates generative discriminators for guidance on particular design demands.

Text Generation

Machine Learning Insides OptVerse AI Solver: Design Principles and Applications

no code implementations11 Jan 2024 Xijun Li, Fangzhou Zhu, Hui-Ling Zhen, Weilin Luo, Meng Lu, Yimin Huang, Zhenan Fan, Zirui Zhou, Yufei Kuang, Zhihai Wang, Zijie Geng, Yang Li, Haoyang Liu, Zhiwu An, Muming Yang, Jianshu Li, Jie Wang, Junchi Yan, Defeng Sun, Tao Zhong, Yong Zhang, Jia Zeng, Mingxuan Yuan, Jianye Hao, Jun Yao, Kun Mao

To this end, we present a comprehensive study on the integration of machine learning (ML) techniques into Huawei Cloud's OptVerse AI Solver, which aims to mitigate the scarcity of real-world mathematical programming instances, and to surpass the capabilities of traditional optimization techniques.

Decision Making Management

LLM4EDA: Emerging Progress in Large Language Models for Electronic Design Automation

1 code implementation28 Dec 2023 RuiZhe Zhong, Xingbo Du, Shixiong Kai, Zhentao Tang, Siyuan Xu, Hui-Ling Zhen, Jianye Hao, Qiang Xu, Mingxuan Yuan, Junchi Yan

Since circuit can be represented with HDL in a textual format, it is reasonable to question whether LLMs can be leveraged in the EDA field to achieve fully automated chip design and generate circuits with improved power, performance, and area (PPA).

Answer Generation Chatbot +1

DeepGate2: Functionality-Aware Circuit Representation Learning

1 code implementation25 May 2023 Zhengyuan Shi, Hongyang Pan, Sadaf Khan, Min Li, Yi Liu, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Zhufei Chu, Qiang Xu

Circuit representation learning aims to obtain neural representations of circuit elements and has emerged as a promising research direction that can be applied to various EDA and logic reasoning tasks.

Graph Neural Network Representation Learning

Conflict-driven Structural Learning Towards Higher Coverage Rate in ATPG

no code implementations4 Mar 2023 Hui-Ling Zhen, Naixing Wang, Junhua Huang, Xinyue Huang, Mingxuan Yuan, Yu Huang

(2) Conflict-driven implication and justification have been applied to increase decision accuracy and solving efficiency.

HardSATGEN: Understanding the Difficulty of Hard SAT Formula Generation and A Strong Structure-Hardness-Aware Baseline

1 code implementation4 Feb 2023 Yang Li, Xinyan Chen, Wenxuan Guo, Xijun Li, Wanqian Luo, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Junchi Yan

On top of the observations that industrial formulae exhibit clear community structure and oversplit substructures lead to the difficulty in semantic formation of logical structures, we propose HardSATGEN, which introduces a fine-grained control mechanism to the neural split-merge paradigm for SAT formula generation to better recover the structural and computational properties of the industrial benchmarks.

SATformer: Transformer-Based UNSAT Core Learning

no code implementations2 Sep 2022 Zhengyuan Shi, Min Li, Yi Liu, Sadaf Khan, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Qiang Xu

This paper introduces SATformer, a novel Transformer-based approach for the Boolean Satisfiability (SAT) problem.

Graph Neural Network Multi-Task Learning

Machine Learning Methods in Solving the Boolean Satisfiability Problem

no code implementations2 Mar 2022 Wenxuan Guo, Junchi Yan, Hui-Ling Zhen, Xijun Li, Mingxuan Yuan, Yaohui Jin

This paper reviews the recent literature on solving the Boolean satisfiability problem (SAT), an archetypal NP-complete problem, with the help of machine learning techniques.

BIG-bench Machine Learning

Learning to Select Cuts for Efficient Mixed-Integer Programming

no code implementations28 May 2021 Zeren Huang, Kerong Wang, Furui Liu, Hui-Ling Zhen, Weinan Zhang, Mingxuan Yuan, Jianye Hao, Yong Yu, Jun Wang

In the online A/B testing of the product planning problems with more than $10^7$ variables and constraints daily, Cut Ranking has achieved the average speedup ratio of 12. 42% over the production solver without any accuracy loss of solution.

Multiple Instance Learning

Bilevel Learning Model Towards Industrial Scheduling

no code implementations10 Aug 2020 Longkang Li, Hui-Ling Zhen, Mingxuan Yuan, Jiawen Lu, XialiangTong, Jia Zeng, Jun Wang, Dirk Schnieders

In this paper, we propose a Bilevel Deep reinforcement learning Scheduler, \textit{BDS}, in which the higher level is responsible for exploring an initial global sequence, whereas the lower level is aiming at exploitation for partial sequence refinements, and the two levels are connected by a sliding-window sampling mechanism.

Deep Reinforcement Learning model +1

Pareto Multi-Task Learning

1 code implementation NeurIPS 2019 Xi Lin, Hui-Ling Zhen, Zhenhua Li, Qingfu Zhang, Sam Kwong

Recently, a novel method is proposed to find one single Pareto optimal solution with good trade-off among different tasks by casting multi-task learning as multiobjective optimization.

Multiobjective Optimization Multi-Task Learning

Nonlinear Collaborative Scheme for Deep Neural Networks

no code implementations4 Nov 2018 Hui-Ling Zhen, Xi Lin, Alan Z. Tang, Zhenhua Li, Qingfu Zhang, Sam Kwong

Different from them, in this paper, we aim to link the generalization ability of a deep network to optimizing a new objective function.

Unsupervised prototype learning in an associative-memory network

no code implementations10 Apr 2017 Hui-Ling Zhen, Shang-Nan Wang, Hai-Jun Zhou

Unsupervised learning in a generalized Hopfield associative-memory network is investigated in this work.

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