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Found 7 papers, 2 papers with code
Mixup Augmentation with Multiple Interpolations
Mixup and its variants form a popular class of data augmentation techniques. Using a random sample pair, it generates a new sample by linear interpolation of the inputs and labels.
PixArt-$α$: Fast Training of Diffusion Transformer for Photorealistic Text-to-Image Synthesis
We hope PIXART-$\alpha$ will provide new insights to the AIGC community and startups to accelerate building their own high-quality yet low-cost generative models from scratch.
MetaMath: Bootstrap Your Own Mathematical Questions for Large Language Models
Our MetaMath-7B model achieves 66. 4% on GSM8K and 19. 4% on MATH, exceeding the state-of-the-art models of the same size by 11. 5% and 8. 7%.
Ranked #57 on
Arithmetic Reasoning
on GSM8K
(using extra training data)
DiffFlow: A Unified SDE Framework for Score-Based Diffusion Models and Generative Adversarial Networks
Generative models can be categorized into two types: explicit generative models that define explicit density forms and allow exact likelihood inference, such as score-based diffusion models (SDMs) and normalizing flows; implicit generative models that directly learn a transformation from the prior to the data distribution, such as generative adversarial nets (GANs).
Attentional Separation-and-Aggregation Network for Self-supervised Depth-Pose Learning in Dynamic Scenes
Learning depth and ego-motion from unlabeled videos via self-supervision from epipolar projection can improve the robustness and accuracy of the 3D perception and localization of vision-based robots.
Hu-Fu: Hardware and Software Collaborative Attack Framework against Neural Networks
So, in this paper, we propose a hardware-software collaborative attack framework to inject hidden neural network Trojans, which works as a back-door without requiring manipulating input images and is flexible for different scenarios.
A Survey of FPGA Based Neural Network Accelerator
Various FPGA based accelerator designs have been proposed with software and hardware optimization techniques to achieve high speed and energy efficiency.
Hardware Architecture
