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Found 5 papers, 1 papers with code
HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis
Machine Learning (ML) has been widely adopted in design exploration using high level synthesis (HLS) to give a better and faster performance, and resource and power estimation at very early stages for FPGA-based design.
Weightless Neural Networks for Efficient Edge Inference
We then demonstrate the viability of the BTHOWeN architecture by presenting an FPGA-based accelerator, and compare its latency and resource usage against similarly accurate quantized DNN accelerators, including Multi-Layer Perceptron (MLP) and convolutional models.
Neuro-Symbolic AI: An Emerging Class of AI Workloads and their Characterization
We find that symbolic models have less potential parallelism than traditional neural models due to complex control flow and low-operational-intensity operations, such as scalar multiplication and tensor addition.
Virtual-Link: A Scalable Multi-Producer, Multi-Consumer Message Queue Architecture for Cross-Core Communication
Cross-core communication is increasingly a bottleneck as the number of processing elements increase per system-on-chip.
Hardware Architecture
Demystifying the MLPerf Benchmark Suite
We present a study on its characteristics and how the MLPerf benchmarks differ from some of the previous deep learning benchmarks like DAWNBench and DeepBench.
