Search Results for author: Magnus Sjalander

Found 2 papers, 2 papers with code

Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing

1 code implementation2 Jan 2019 Yaman Umuroglu, Davide Conficconi, Lahiru Rasnayake, Thomas B. Preusser, Magnus Sjalander

BISMO, a vectorized bit-serial matrix multiplication overlay for reconfigurable computing, previously utilized the excellent binary-operation performance of FPGAs to offer a matrix multiplication performance that scales with required precision and parallelism.

Hardware Architecture

BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing

1 code implementation22 Jun 2018 Yaman Umuroglu, Lahiru Rasnayake, Magnus Sjalander

BISMO utilizes the excellent binary-operation performance of FPGAs to offer a matrix multiplication performance that scales with required precision and parallelism.

Hardware Architecture

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