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Found 33 papers, 8 papers with code
UDC: Unified DNAS for Compressible TinyML Models
Deploying TinyML models on low-cost IoT hardware is very challenging, due to limited device memory capacity.
Federated Learning Based on Dynamic Regularization
We propose a novel federated learning method for distributively training neural network models, where the server orchestrates cooperation between a subset of randomly chosen devices in each round.
Towards Efficient Point Cloud Graph Neural Networks Through Architectural Simplification
In recent years graph neural network (GNN)-based approaches have become a popular strategy for processing point cloud data, regularly achieving state-of-the-art performance on a variety of tasks.
S2TA: Exploiting Structured Sparsity for Energy-Efficient Mobile CNN Acceleration
We propose to exploit structured sparsity, more specifically, Density Bound Block (DBB) sparsity for both weights and activations.
On the Effects of Quantisation on Model Uncertainty in Bayesian Neural Networks
Bayesian neural networks (BNNs) are making significant progress in many research areas where decision-making needs to be accompanied by uncertainty estimation.
Doping: A technique for efficient compression of LSTM models using sparse structured additive matrices
Additionally, results with doped kronecker product matrices demonstrate state-of-the-art accuracy at large compression factors (10 - 25x) across 4 natural language processing applications with minor loss in accuracy.
Information contraction in noisy binary neural networks and its implications
Our SDPI can be applied to various information processing systems, including neural networks and cellular automata.
MicroNets: Neural Network Architectures for Deploying TinyML Applications on Commodity Microcontrollers
To address this challenge, neural architecture search (NAS) promises to help design accurate ML models that meet the tight MCU memory, latency and energy constraints.
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Rank and run-time aware compression of NLP Applications
We evaluate the impact of this technique on 5 NLP benchmarks across multiple tasks (Translation, Intent Detection, Language Modeling) and show that for similar accuracy values and compression factors, HMF can achieve more than 2. 32x faster inference run-time than pruning and 16. 77% better accuracy than LMF.
Stochastic-YOLO: Efficient Probabilistic Object Detection under Dataset Shifts
In this paper, we adapt the well-established YOLOv3 architecture to generate uncertainty estimations by introducing stochasticity in the form of Monte Carlo Dropout (MC-Drop), and evaluate it across different levels of dataset shift.
Sparse Systolic Tensor Array for Efficient CNN Hardware Acceleration
In this paper, we address a key architectural challenge with structural sparsity: how to provide support for a range of sparsity levels while maintaining high utilization of the hardware.
High Throughput Matrix-Matrix Multiplication between Asymmetric Bit-Width Operands
While existing SIMD matrix multiplication instructions for symmetric bit-width operands can support operands of mixed precision by zero- or sign-extending the narrow operand to match the size of the other operands, they cannot exploit the benefit of narrow bit-width of one of the operands.
Efficient Residue Number System Based Winograd Convolution
Prior research has shown that Winograd algorithm can reduce the computational complexity of convolutional neural networks (CNN) with weights and activations represented in floating point.
TinyLSTMs: Efficient Neural Speech Enhancement for Hearing Aids
Modern speech enhancement algorithms achieve remarkable noise suppression by means of large recurrent neural networks (RNNs).
Systolic Tensor Array: An Efficient Structured-Sparse GEMM Accelerator for Mobile CNN Inference
Convolutional neural network (CNN) inference on mobile devices demands efficient hardware acceleration of low-precision (INT8) general matrix multiplication (GEMM).
Searching for Winograd-aware Quantized Networks
Lightweight architectural designs of Convolutional Neural Networks (CNNs) together with quantization have paved the way for the deployment of demanding computer vision applications on mobile devices.
Compressing Language Models using Doped Kronecker Products
Kronecker Products (KP) have been used to compress IoT RNN Applications by 15-38x compression factors, achieving better results than traditional compression methods.
Noisy Machines: Understanding Noisy Neural Networks and Enhancing Robustness to Analog Hardware Errors Using Distillation
Hence, for successful deployment on analog accelerators, it is essential to be able to train deep neural networks to be robust to random continuous noise in the network weights, which is a somewhat new challenge in machine learning.
ISP4ML: Understanding the Role of Image Signal Processing in Efficient Deep Learning Vision Systems
In this work, we investigate the efficacy of the ISP in CNN classification tasks, and outline the system-level trade-offs between prediction accuracy and computational cost.
Ternary MobileNets via Per-Layer Hybrid Filter Banks
Using this proposed quantization method, we quantized a substantial portion of weight filters of MobileNets to ternary values resulting in 27. 98% savings in energy, and a 51. 07% reduction in the model size, while achieving comparable accuracy and no degradation in throughput on specialized hardware in comparison to the baseline full-precision MobileNets.
Pushing the limits of RNN Compression
This paper introduces a method to compress RNNs for resource constrained environments using Kronecker product (KP).
Run-Time Efficient RNN Compression for Inference on Edge Devices
Recurrent neural networks can be large and compute-intensive, yet many applications that benefit from RNNs run on small devices with very limited compute and storage capabilities while still having run-time constraints.
Compressing RNNs for IoT devices by 15-38x using Kronecker Products
Recurrent Neural Networks (RNN) can be difficult to deploy on resource constrained devices due to their size. As a result, there is a need for compression techniques that can significantly compress RNNs without negatively impacting task accuracy.
SpArSe: Sparse Architecture Search for CNNs on Resource-Constrained Microcontrollers
The vast majority of processors in the world are actually microcontroller units (MCUs), which find widespread use performing simple control tasks in applications ranging from automobiles to medical devices and office equipment.
Efficient Winograd or Cook-Toom Convolution Kernel Implementation on Widely Used Mobile CPUs
The Winograd or Cook-Toom class of algorithms help to reduce the overall compute complexity of many modern deep convolutional neural networks (CNNs).
Ternary Hybrid Neural-Tree Networks for Highly Constrained IoT Applications
Machine learning-based applications are increasingly prevalent in IoT devices.
Learning low-precision neural networks without Straight-Through Estimator(STE)
The Straight-Through Estimator (STE) is widely used for back-propagating gradients through the quantization function, but the STE technique lacks a complete theoretical understanding.
FixyNN: Efficient Hardware for Mobile Computer Vision via Transfer Learning
Over a suite of six datasets we trained models via transfer learning with an accuracy loss of $<1\%$ resulting in up to 11. 2 TOPS/W - nearly $2 \times$ more efficient than a conventional programmable CNN accelerator of the same area.
Efficient and Robust Machine Learning for Real-World Systems
In that way, we provide an extensive overview of the current state-of-the-art of robust and efficient machine learning for real-world systems.
Energy Efficient Hardware for On-Device CNN Inference via Transfer Learning
On-device CNN inference for real-time computer vision applications can result in computational demands that far exceed the energy budgets of mobile devices.
SCALE-Sim: Systolic CNN Accelerator
Systolic Arrays are one of the most popular compute substrates within Deep Learning accelerators today, as they provide extremely high efficiency for running dense matrix multiplications.
Distributed, Parallel, and Cluster Computing Hardware Architecture
Euphrates: Algorithm-SoC Co-Design for Low-Power Mobile Continuous Vision
Specifically, we propose to expose the motion data that is naturally generated by the Image Signal Processor (ISP) early in the vision pipeline to the CNN engine.
Mobile Machine Learning Hardware at ARM: A Systems-on-Chip (SoC) Perspective
Machine learning is playing an increasingly significant role in emerging mobile application domains such as AR/VR, ADAS, etc.
