1 code implementation • 20 Aug 2020 • Kris Nikov, Mohammad Hosseinabady, Rafael Asenjo, Andrés Rodríguezz, Angeles Navarro, Jose Nunez-Yanez
This paper presents a methodology for simultaneous heterogeneous computing, named ENEAC, where a quad core ARM Cortex-A53 CPU works in tandem with a preprogrammed on-board FPGA accelerator.
Distributed, Parallel, and Cluster Computing Hardware Architecture Performance
no code implementations • 19 Jun 2020 • Jose Nunez-Yanez, Kris Nikov, Kerstin Eder, Mohammad Hosseinabady
This paper investigates the application of a robust CPU-based power modelling methodology that performs an automatic search of explanatory events derived from performance counters to embedded GPUs.
Other Computer Science
