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Found 14 papers, 3 papers with code
Achieving High Throughput with a Trainable Neural-Network-Based Equalizer for Communications on FPGA
The ever-increasing data rates of modern communication systems lead to severe distortions of the communication signal, imposing great challenges to state-of-the-art signal processing algorithms.
CNN-Based Equalization for Communications: Achieving Gigabit Throughput with a Flexible FPGA Hardware Architecture
Thus, in this work, we present a high-performance FPGA implementation of an ANN-based equalizer, which meets the throughput requirements of modern optical communication systems.
Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications
In this work, we present a high-throughput field programmable gate array (FPGA) demonstrator of an artificial neural network (ANN)-based equalizer.
Fully-blind Neural Network Based Equalization for Severe Nonlinear Distortions in 112 Gbit/s Passive Optical Networks
We demonstrate and evaluate a fully-blind digital signal processing (DSP) chain for 100G passive optical networks (PONs), and analyze different equalizer topologies based on neural networks with low hardware complexity.
A Mapping of Triangular Block Interleavers to DRAM for Optical Satellite Communication
In this paper, we investigate triangular block interleavers for the aforementioned application and show that the standard mapping of symbols used for SRAMs results in low bandwidth utilization for DRAMs, in some cases below 50 %.
Variational Quantum Linear Solver enhanced Quantum Support Vector Machine
Based on this, we explore the practicality and effectiveness of our algorithm by constructing a classifier capable of classification in a feature space ranging from one to seven dimensions.
Unsupervised ANN-Based Equalizer and Its Trainable FPGA Implementation
In recent years, communication engineers put strong emphasis on artificial neural network (ANN)-based algorithms with the aim of increasing the flexibility and autonomy of the system and its components.
A Hybrid Approach combining ANN-based and Conventional Demapping in Communication for Efficient FPGA-Implementation
In communication systems, Autoencoder (AE) refers to the concept of replacing parts of the transmitter and receiver by artificial neural networks (ANNs) to train the system end-to-end over a channel model.
Blind and Channel-agnostic Equalization Using Adversarial Networks
The proposed approach is independent of the equalizer topology and enables the application of powerful neural network based equalizers.
HALF: Holistic Auto Machine Learning for FPGAs
To efficiently implement DNNs on a specific FPGA platform for a given cost criterion, e. g. energy efficiency, an enormous amount of design parameters has to be considered from the topology down to the final hardware implementation.
The gem5 Simulator: Version 20.0+
The open-source and community-supported gem5 simulator is one of the most popular tools for computer architecture research.
Hardware Architecture
Sparsity in Deep Neural Networks - An Empirical Investigation with TensorQuant
Various approaches have been investigated to reduce the necessary resources, one of which is to leverage the sparsity occurring in deep neural networks due to the high levels of redundancy in the network parameters.
FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs
In this paper, we present the first systematic exploration of this design space as a function of precision for Bidirectional Long Short-Term Memory (BiLSTM) neural network.
Optical Character Recognition
Optical Character Recognition (OCR)
+1
TensorQuant - A Simulation Toolbox for Deep Neural Network Quantization
While most related publications validate the proposed approach on a single DNN topology, it appears to be evident, that the optimal choice of the quantization method and number of coding bits is topology dependent.
