GOALPlace: Begin with the End in Mind

no code implementations • 5 Jul 2024 • Anthony Agnesina, Rongjian Liang, Geraldo Pradipta, Anand Rajaram, Haoxing Ren

Co-optimizing placement with congestion is integral to achieving high-quality designs.

ChipNeMo: Domain-Adapted LLMs for Chip Design

no code implementations • 31 Oct 2023 • Mingjie Liu, Teodor-Dumitru Ene, Robert Kirby, Chris Cheng, Nathaniel Pinckney, Rongjian Liang, Jonah Alben, Himyanshu Anand, Sanmitra Banerjee, Ismet Bayraktaroglu, Bonita Bhaskaran, Bryan Catanzaro, Arjun Chaudhuri, Sharon Clay, Bill Dally, Laura Dang, Parikshit Deshpande, Siddhanth Dhodhi, Sameer Halepete, Eric Hill, Jiashang Hu, Sumit Jain, Ankit Jindal, Brucek Khailany, George Kokai, Kishor Kunal, Xiaowei Li, Charley Lind, Hao liu, Stuart Oberman, Sujeet Omar, Ghasem Pasandi, Sreedhar Pratty, Jonathan Raiman, Ambar Sarkar, Zhengjiang Shao, Hanfei Sun, Pratik P Suthar, Varun Tej, Walker Turner, Kaizhe Xu, Haoxing Ren

ChipNeMo aims to explore the applications of large language models (LLMs) for industrial chip design.

Chatbot Domain Adaptation +2

Automatic Routability Predictor Development Using Neural Architecture Search

no code implementations • 3 Dec 2020 • Chen-Chia Chang, Jingyu Pan, Tunhou Zhang, Zhiyao Xie, Jiang Hu, Weiyi Qi, Chun-Wei Lin, Rongjian Liang, Joydeep Mitra, Elias Fallon, Yiran Chen

The rise of machine learning technology inspires a boom of its applications in electronic design automation (EDA) and helps improve the degree of automation in chip designs.

BIG-bench Machine Learning Neural Architecture Search

Net2: A Graph Attention Network Method Customized for Pre-Placement Net Length Estimation

no code implementations • 27 Nov 2020 • Zhiyao Xie, Rongjian Liang, Xiaoqing Xu, Jiang Hu, Yixiao Duan, Yiran Chen

Net length is a key proxy metric for optimizing timing and power across various stages of a standard digital design flow.

Graph Attention