Learning Semantic Representations to Verify Hardware Designs

no code implementations • NeurIPS 2021 • Shobha Vasudevan, Wenjie (Joe) Jiang, David Bieber, Rishabh Singh, hamid shojaei, C. Richard Ho, Charles Sutton

We evaluate Design2Vec on three real-world hardware designs, including an industrial chip used in commercial data centers.

Graph Neural Network Learning Semantic Representations

Feature Engineering for Scalable Application-Level Post-Silicon Debugging

no code implementations • 8 Feb 2021 • Debjit Pal, Shobha Vasudevan

Our method for message selection optimizes flow specification coverage and trace buffer utilization.

Feature Engineering Outlier Detection