Search Results for author:
Found 10 papers, 6 papers with code
Learning Machines Implemented on Non-Deterministic Hardware
This paper highlights new opportunities for designing large-scale machine learning systems as a consequence of blurring traditional boundaries that have allowed algorithm designers and application-level practitioners to stay -- for the most part -- oblivious to the details of the underlying hardware-level implementations.
Deep Learning with Limited Numerical Precision
Training of large-scale deep neural networks is often constrained by the available computational resources.
Model Accuracy and Runtime Tradeoff in Distributed Deep Learning:A Systematic Study
This paper presents Rudra, a parameter server based distributed computing framework tuned for training large-scale deep neural networks.
Staleness-aware Async-SGD for Distributed Deep Learning
Deep neural networks have been shown to achieve state-of-the-art performance in several machine learning tasks.
To prune, or not to prune: exploring the efficacy of pruning for model compression
Model pruning seeks to induce sparsity in a deep neural network's various connection matrices, thereby reducing the number of nonzero-valued parameters in the model.
Lingvo: a Modular and Scalable Framework for Sequence-to-Sequence Modeling
Lingvo is a Tensorflow framework offering a complete solution for collaborative deep learning research, with a particular focus towards sequence-to-sequence models.
Accelerator-aware Neural Network Design using AutoML
While neural network hardware accelerators provide a substantial amount of raw compute throughput, the models deployed on them must be co-designed for the underlying hardware architecture to obtain the optimal system performance.
Hardware Aware Neural Architecture Search
Image Classification
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MobileDets: Searching for Object Detection Architectures for Mobile Accelerators
By incorporating regular convolutions in the search space and directly optimizing the network architectures for object detection, we obtain a family of object detection models, MobileDets, that achieve state-of-the-art results across mobile accelerators.
Discovering Multi-Hardware Mobile Models via Architecture Search
Hardware-aware neural architecture designs have been predominantly focusing on optimizing model performance on single hardware and model development complexity, where another important factor, model deployment complexity, has been largely ignored.
Searching for Efficient Neural Architectures for On-Device ML on Edge TPUs
On-device ML accelerators are becoming a standard in modern mobile system-on-chips (SoC).
