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Found 15 papers, 5 papers with code
LL-GNN: Low Latency Graph Neural Networks on FPGAs for Particle Detectors
In addition, we introduce an outer-product based matrix multiplication approach which is enhanced by the strength reduction for low latency design.
Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design
By jointly optimizing the algorithm and hardware, our FPGA-based butterfly accelerator achieves 14. 2 to 23. 2 times speedup over state-of-the-art accelerators normalized to the same computational budget.
Understanding intra-day price formation process by agent-based financial market simulation: calibrating the extended chiarella model
It is shown that the machine learning surrogate learned in the proposed method is an accurate proxy of the true agent-based market simulation.
High-frequency financial market simulation and flash crash scenarios analysis: an agent-based modelling approach
We scrutinise the market dynamics during the simulated flash crash and show that the simulated dynamics are consistent with what happened in historical flash crash scenarios.
Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator
Recent advances in algorithm-hardware co-design for deep neural networks (DNNs) have demonstrated their potential in automatically designing neural architectures and hardware designs.
Accelerating Recurrent Neural Networks for Gravitational Wave Experiments
The proposed approach has been evaluated based on two LSTM models, targeting a ZYNQ 7045 FPGA and a U250 FPGA.
Optimizing Bayesian Recurrent Neural Networks on an FPGA-based Accelerator
To further improve the overall algorithmic-hardware performance, a co-design framework is proposed to explore the most fitting algorithmic-hardware configurations for Bayesian RNNs.
High-Performance FPGA-based Accelerator for Bayesian Neural Networks
Neural networks (NNs) have demonstrated their potential in a wide range of applications such as image recognition, decision making or recommendation systems.
An FPGA Accelerated Method for Training Feed-forward Neural Networks Using Alternating Direction Method of Multipliers and LSMR
In this project, we have successfully designed, implemented, deployed and tested a novel FPGA accelerated algorithm for neural network training.
An Analysis of Alternating Direction Method of Multipliers for Feed-forward Neural Networks
This is while the use of matrix inversion, which is challenging for hardware implementation, is avoided in this method.
Learning Absolute Sound Source Localisation With Limited Supervisions
By combining the unreliable innate response and the sparse reinforcement rewards, an accurate auditory space map, which is hard to be achieved by either one of these two kind of supervisions, can eventually be learned.
Optimizing CNN-based Hyperspectral ImageClassification on FPGAs
Hyperspectral image (HSI) classification has been widely adopted in applications involving remote sensing imagery analysis which require high classification accuracy and real-time processing speed.
Convolution Based Spectral Partitioning Architecture for Hyperspectral Image Classification
Hyperspectral images (HSIs) can distinguish materials with high number of spectral bands, which is widely adopted in remote sensing applications and benefits in high accuracy land cover classifications.
Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going
Deep neural networks have proven to be particularly effective in visual and audio recognition tasks.
Efficient Structured Pruning and Architecture Searching for Group Convolution
Efficient inference of Convolutional Neural Networks is a thriving topic recently.
