Search Results for author: Wayne Luk

Found 19 papers, 6 papers with code

Sets are all you need: Ultrafast jet classification on FPGAs for HL-LHC

no code implementations2 Feb 2024 Patrick Odagiu, Zhiqiang Que, Javier Duarte, Johannes Haller, Gregor Kasieczka, Artur Lobanov, Vladimir Loncar, Wayne Luk, Jennifer Ngadiuba, Maurizio Pierini, Philipp Rincke, Arpita Seksaria, Sioni Summers, Andre Sznajder, Alexander Tapper, Thea K. Aarrestad

We study various machine learning based algorithms for performing accurate jet flavor classification on field-programmable gate arrays and demonstrate how latency and resource consumption scale with the input size and choice of algorithm.

Quantization

Deeper Hedging: A New Agent-based Model for Effective Deep Hedging

no code implementations28 Oct 2023 Kang Gao, Stephen Weston, Perukrishnen Vytelingum, Namid R. Stillman, Wayne Luk, Ce Guo

With the proposed Chiarella-Heston model, we generate a training dataset to train a deep hedging agent for optimal hedging strategies under various transaction cost levels.

When Monte-Carlo Dropout Meets Multi-Exit: Optimizing Bayesian Neural Networks on FPGA

1 code implementation13 Aug 2023 Hongxiang Fan, Hao Chen, Liam Castelli, Zhiqiang Que, He Li, Kenneth Long, Wayne Luk

Bayesian Neural Networks (BayesNNs) have demonstrated their capability of providing calibrated prediction for safety-critical applications such as medical imaging and autonomous driving.

Autonomous Driving

MetaML: Automating Customizable Cross-Stage Design-Flow for Deep Learning Acceleration

no code implementations14 Jun 2023 Zhiqiang Que, Shuo Liu, Markus Rognlien, Ce Guo, Jose G. F. Coutinho, Wayne Luk

This paper introduces a novel optimization framework for deep neural network (DNN) hardware accelerators, enabling the rapid development of customized and automated design flows.

LL-GNN: Low Latency Graph Neural Networks on FPGAs for High Energy Physics

1 code implementation28 Sep 2022 Zhiqiang Que, Hongxiang Fan, Marcus Loo, He Li, Michaela Blott, Maurizio Pierini, Alexander Tapper, Wayne Luk

This work presents a novel reconfigurable architecture for Low Latency Graph Neural Network (LL-GNN) designs for particle detectors, delivering unprecedented low latency performance.

Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design

no code implementations20 Sep 2022 Hongxiang Fan, Thomas Chau, Stylianos I. Venieris, Royson Lee, Alexandros Kouris, Wayne Luk, Nicholas D. Lane, Mohamed S. Abdelfattah

By jointly optimizing the algorithm and hardware, our FPGA-based butterfly accelerator achieves 14. 2 to 23. 2 times speedup over state-of-the-art accelerators normalized to the same computational budget.

High-frequency financial market simulation and flash crash scenarios analysis: an agent-based modelling approach

no code implementations29 Aug 2022 Kang Gao, Perukrishnen Vytelingum, Stephen Weston, Wayne Luk, Ce Guo

We scrutinise the market dynamics during the simulated flash crash and show that the simulated dynamics are consistent with what happened in historical flash crash scenarios.

Time Series Analysis

Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator

no code implementations24 Nov 2021 Hongxiang Fan, Martin Ferianc, Zhiqiang Que, He Li, Shuanglong Liu, Xinyu Niu, Wayne Luk

Recent advances in algorithm-hardware co-design for deep neural networks (DNNs) have demonstrated their potential in automatically designing neural architectures and hardware designs.

Optimizing Bayesian Recurrent Neural Networks on an FPGA-based Accelerator

no code implementations4 Jun 2021 Martin Ferianc, Zhiqiang Que, Hongxiang Fan, Wayne Luk, Miguel Rodrigues

To further improve the overall algorithmic-hardware performance, a co-design framework is proposed to explore the most fitting algorithmic-hardware configurations for Bayesian RNNs.

Time Series Analysis

High-Performance FPGA-based Accelerator for Bayesian Neural Networks

no code implementations12 May 2021 Hongxiang Fan, Martin Ferianc, Miguel Rodrigues, HongYu Zhou, Xinyu Niu, Wayne Luk

Neural networks (NNs) have demonstrated their potential in a wide range of applications such as image recognition, decision making or recommendation systems.

Autonomous Vehicles Bayesian Inference +3

An FPGA Accelerated Method for Training Feed-forward Neural Networks Using Alternating Direction Method of Multipliers and LSMR

no code implementations6 Sep 2020 Seyedeh Niusha Alavi Foumani, Ce Guo, Wayne Luk

In this project, we have successfully designed, implemented, deployed and tested a novel FPGA accelerated algorithm for neural network training.

An Analysis of Alternating Direction Method of Multipliers for Feed-forward Neural Networks

no code implementations6 Sep 2020 Seyedeh Niusha Alavi Foumani, Ce Guo, Wayne Luk

This is while the use of matrix inversion, which is challenging for hardware implementation, is avoided in this method.

Learning Absolute Sound Source Localisation With Limited Supervisions

no code implementations28 Jan 2020 Yang Chu, Wayne Luk, Dan Goodman

By combining the unreliable innate response and the sparse reinforcement rewards, an accurate auditory space map, which is hard to be achieved by either one of these two kind of supervisions, can eventually be learned.

Optimizing CNN-based Hyperspectral ImageClassification on FPGAs

1 code implementation27 Jun 2019 Shuanglong Liu, Ringo S. W. Chu, Xiwei Wang, Wayne Luk

Hyperspectral image (HSI) classification has been widely adopted in applications involving remote sensing imagery analysis which require high classification accuracy and real-time processing speed.

Classification General Classification +1

Convolution Based Spectral Partitioning Architecture for Hyperspectral Image Classification

1 code implementation27 Jun 2019 Ringo S. W. Chu, Ho-Cheung Ng, Xiwei Wang, Wayne Luk

Hyperspectral images (HSIs) can distinguish materials with high number of spectral bands, which is widely adopted in remote sensing applications and benefits in high accuracy land cover classifications.

Classification General Classification +1

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