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Found 16 papers, 0 papers with code
Schrödinger's FP: Dynamic Adaptation of Floating-Point Containers for Deep Learning Training
We introduce a software-hardware co-design approach to reduce memory traffic and footprint during training with BFloat16 or FP32 boosting energy efficiency and execution time performance.
Mokey: Enabling Narrow Fixed-Point Inference for Out-of-the-Box Floating-Point Transformer Models
Mokey reduces the footprint of state-of-the-art 32-bit or 16-bit floating-point transformer models by quantizing all values to 4-bit indexes into dictionaries of representative 16-bit fixed-point centroids.
APack: Off-Chip, Lossless Data Compression for Efficient Deep Learning Inference
When integrated with a Tensorcore-based accelerator, APack boosts the speedup and energy efficiency to 1. 44X and 1. 37X respectively.
FPRaker: A Processing Element For Accelerating Neural Network Training
We demonstrate that FPRaker can be used to compose an accelerator for training and that it can improve performance and energy efficiency compared to using conventional floating-point units under ISO-compute area constraints.
TensorDash: Exploiting Sparsity to Accelerate Deep Neural Network Training and Inference
TensorDash is a hardware level technique for enabling data-parallel MAC units to take advantage of sparsity in their input operand streams.
GOBO: Quantizing Attention-Based NLP Models for Low Latency and Energy Efficient Inference
Second, we present a co-designed hardware architecture that also reduces computation.
BitPruning: Learning Bitlengths for Aggressive and Accurate Quantization
Neural networks have demonstrably achieved state-of-the art accuracy using low-bitlength integer quantization, yielding both execution time and energy benefits on existing hardware designs that support short bitlengths.
Training CNNs faster with Dynamic Input and Kernel Downsampling
We reduce training time in convolutional networks (CNNs) with a method that, for some of the mini-batches: a) scales down the resolution of input images via downsampling, and b) reduces the forward pass operations via pooling on the convolution filters.
Laconic Deep Learning Computing
A Laconic configuration that uses a 1K-wire weight memory interface, outperforms the 2K-wire conventional accelerator by 15. 4x and is 1. 95x more energy efficient.
DPRed: Making Typical Activation and Weight Values Matter In Deep Learning Computing
The per group precisions are selected statically for the weights and dynamically by hardware for the activations.
Bit-Tactical: Exploiting Ineffectual Computations in Convolutional Neural Networks: Which, Why, and How
We show that, during inference with Convolutional Neural Networks (CNNs), more than 2x to $8x ineffectual work can be exposed if instead of targeting those weights and activations that are zero, we target different combinations of value stream properties.
Tartan: Accelerating Fully-Connected and Convolutional Layers in Deep Learning Networks by Exploiting Numerical Precision Variability
Experiments on image classification CNNs show that on average across all networks studied, TRT outperforms a state-of-the-art bit-parallel accelerator by 1:90x without any loss in accuracy while it is 1:17x more energy efficient.
Loom: Exploiting Weight and Activation Precisions to Accelerate Convolutional Neural Networks
LM can trade-off accuracy for additional improvements in execution performance and energy efficiency and compares favorably to an accelerator that targeted only activation precisions.
Dynamic Stripes: Exploiting the Dynamic Precision Requirements of Activation Values in Neural Networks
Stripes is a Deep Neural Network (DNN) accelerator that uses bit-serial computation to offer performance that is proportional to the fixed-point precision of the activation values.
Cnvlutin2: Ineffectual-Activation-and-Weight-Free Deep Neural Network Computing
We also present a modified organization that detects the activations that are deemed as ineffectual while fetching them from memory.
Reduced-Precision Strategies for Bounded Memory in Deep Neural Nets
A diverse set of CNNs is analyzed showing that compared to a conventional implementation using a 32-bit floating-point representation for all layers, and with less than 1% loss in relative accuracy, the data footprint required by these networks can be reduced by an average of 74% and up to 92%.
