no code implementations • 6 Feb 2020 • Byung-Ik Ahn
The proposed architecture maximizes the utilization of multipliers by designing the computational circuit with the same structure as that of the computational flow of the model, rather than mapping computations to fixed hardware.
no code implementations • 4 Oct 2018 • Sang-Min Choi, Jiho Park, Quan Nguyen, Andre Cronje, Kiyoung Jang, Hyunjoon Cheon, Yo-Sub Han, Byung-Ik Ahn
Each event block is signed by the hashes of the creating node and its $k$ peers.
Distributed, Parallel, and Cluster Computing
