Comparing domain wall synapse with other Non Volatile Memory devices for on-chip learning in Analog Hardware Neural Network

no code implementations • 28 Oct 2019 • Divya Kaushik, Utkarsh Singh, Upasana Sahu, Indu Sreedevi, Debanjan Bhowmik

We next incorporate the DW synapse as a Verilog-A model in the crossbar array based NN circuit we design on SPICE circuit simulator.

On-chip learning in a conventional silicon MOSFET based Analog Hardware Neural Network

no code implementations • 1 Jul 2019 • Nilabjo Dey, Janak Sharda, Utkarsh Saxena, Divya Kaushik, Utkarsh Singh, Debanjan Bhowmik

On-chip learning in a crossbar array based analog hardware Neural Network (NN) has been shown to have major advantages in terms of speed and energy compared to training NN on a traditional computer.

On-chip learning for domain wall synapse based Fully Connected Neural Network

no code implementations • 25 Nov 2018 • Apoorv Dankar, Anand Verma, Utkarsh Saxena, Divya Kaushik, Shouri Chatterjee, Debanjan Bhowmik

Spintronic devices are considered as promising candidates in implementing neuromorphic systems or hardware neural networks, which are expected to perform better than other existing computing systems for certain data classification and regression tasks.