Search Results for author: Geogios Fainekos

Found 1 papers, 0 papers with code

A Neurosymbolic Approach to the Verification of Temporal Logic Properties of Learning enabled Control Systems

no code implementations7 Mar 2023 Navid Hashemi, Bardh Hoxha, Tomoya Yamaguchi, Danil Prokhorov, Geogios Fainekos, Jyotirmoy Deshmukh

In this paper, we present a model for the verification of Neural Network (NN) controllers for general STL specifications using a custom neural architecture where we map an STL formula into a feed-forward neural network with ReLU activation.

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