Reducing the Barriers to Entry for Foundation Model Training

no code implementations • 12 Apr 2024 • Paolo Faraboschi, Ellis Giles, Justin Hotard, Konstanty Owczarek, Andrew Wheeler

The world has recently witnessed an unprecedented acceleration in demands for Machine Learning and Artificial Intelligence applications.

X-TIME: An in-memory engine for accelerating machine learning on tabular data with CAMs

1 code implementation • 3 Apr 2023 • Giacomo Pedretti, John Moon, Pedro Bruel, Sergey Serebryakov, Ron M. Roth, Luca Buonanno, Tobias Ziegler, Cong Xu, Martin Foltin, Paolo Faraboschi, Jim Ignowski, Catherine E. Graves

In this work, we focus on an overall analog-digital architecture implementing a novel increased precision analog CAM and a programmable network on chip allowing the inference of state-of-the-art tree-based ML models, such as XGBoost and CatBoost.

PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inference

no code implementations • 29 Jan 2019 • Aayush Ankit, Izzat El Hajj, Sai Rahul Chalamalasetti, Geoffrey Ndu, Martin Foltin, R. Stanley Williams, Paolo Faraboschi, Wen-mei Hwu, John Paul Strachan, Kaushik Roy, Dejan S Milojicic

We also present the PUMA compiler which translates high-level code to PUMA ISA.

Emerging Technologies Hardware Architecture