2 code implementations • 17 Sep 2023 • Pian Yu, Xiao Tan, Dimos V. Dimarogonas
In this work, we propose a novel approach for the continuous-time control synthesis of nonlinear systems under nested signal temporal logic (STL) specifications.
no code implementations • 16 Mar 2021 • Pian Yu, Yulong Gao, Frank J. Jiang, Karl H. Johansson, Dimos V. Dimarogonas
It is shown that when the STL formula is robustly satisfiable and the initial state of the system belongs to the initial root node of the tTLT, it is guaranteed that the trajectory generated by the control synthesis algorithm satisfies the STL formula.
