no code implementations • 25 Mar 2024 • Tom Wettlin, Youxi Lin, Nebojsa Stojanovic, Stefano Calabrò, Ruoxu Wang, Lewei Zhang, Maxim Kuschnerov
We show a beyond 200Gb/s VCSEL transmission experiment.
no code implementations • 28 Feb 2023 • Elias Arnold, Georg Böcherer, Florian Strasser, Eric Müller, Philipp Spilger, Sebastian Billaudelle, Johannes Weis, Johannes Schemmel, Stefano Calabrò, Maxim Kuschnerov
The SNN demapper is implemented in software and on the analog neuromorphic hardware system BrainScaleS-2 (BSS-2).
no code implementations • 14 Jun 2022 • Md Sabbir-Bin Hossain, Georg Böcherer, Youxi Lin, Shuangxu Li, Stefano Calabrò, Andrei Nedelcu, Talha Rahman, Tom Wettlin, Jinlong Wei, Nebojša Stojanović, Changsong Xie, Maxim Kuschnerov, Stephan Pachnicke
For 200Gb/s net rates, cap probabilistic shaped PAM-8 with different Gaussian orders are experimentally compared against uniform PAM-8.
no code implementations • 1 Jun 2022 • Elias Arnold, Georg Böcherer, Eric Müller, Philipp Spilger, Johannes Schemmel, Stefano Calabrò, Maxim Kuschnerov
A spiking neural network (SNN) non-linear equalizer model is implemented on the mixed-signal neuromorphic hardware system BrainScaleS-2 and evaluated for an IM/DD link.
no code implementations • 18 May 2022 • Md Sabbir-Bin Hossain, Georg Boecherer, Talha Rahman, Nebojsa Stojanovic, Patrick Schulte, Stefano Calabrò, Jinlong Wei, Christian Bluemm, Tom Wettlin, Changsong Xie, Maxim Kuschnerov, Stephan Pachnicke
For 200Gbit/s net rates, uniform PAM-4, 6 and 8 are experimentally compared against probabilistic shaped PAM-8 cap and cup variants.
no code implementations • 9 May 2022 • Elias Arnold, Georg Böcherer, Eric Müller, Philipp Spilger, Johannes Schemmel, Stefano Calabrò, Maxim Kuschnerov
A spiking neural network (SNN) equalizer model suitable for electronic neuromorphic hardware is designed for an IM/DD link.
no code implementations • 29 May 2020 • Tom Wettlin, Talha Rahman, Jinlong Wei, Stefano Calabrò, Nebojsa Stojanovic, Stephan Pachnicke
We show an example, in which the number of third-order kernels is halved without any appreciable performance degradation.