Search Results for author: Yi Kang

Found 4 papers, 0 papers with code

Graph Attention-Based Symmetry Constraint Extraction for Analog Circuits

no code implementations22 Dec 2023 Qi Xu, Lijie Wang, Jing Wang, Song Chen, Lin Cheng, Yi Kang

In recent years, analog circuits have received extensive attention and are widely used in many emerging applications.

Graph Attention

AiDAC: A Low-Cost In-Memory Computing Architecture with All-Analog Multi-Bit Compute and Interconnect

no code implementations19 Dec 2023 Zihao Xuan, Song Chen, Yi Kang

Analog in-memory computing (AiMC) is an emerging technology that shows fantastic performance superiority for neural network acceleration.

NicePIM: Design Space Exploration for Processing-In-Memory DNN Accelerators with 3D-Stacked-DRAM

no code implementations30 May 2023 Junpeng Wang, Mengke Ge, Bo Ding, Qi Xu, Song Chen, Yi Kang

As one of the feasible processing-in-memory(PIM) architectures, 3D-stacked-DRAM-based PIM(DRAM-PIM) architecture enables large-capacity memory and low-cost memory access, which is a promising solution for DNN accelerators with better performance and energy efficiency.

Scheduling

Task modules Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems Based on Modern Heterogeneous FPGAs

no code implementations11 Dec 2022 Bo Ding, Jinglei Huang, Junpeng Wang, Qi Xu, Song Chen, Yi Kang

To better solve the problems in the automation process of FPGA-PDRS and narrow the gap between algorithm and application, in this paper, we propose a complete workflow including three parts, pre-processing to generate the list of task modules candidate shapes according to the resources requirements, exploration process to search the solution of task modules partitioning, scheduling, and floorplanning, and post-optimization to improve the success rate of floorplan.

Scheduling

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