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Found 7 papers, 4 papers with code
GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors
The last few years have seen the emergence of IoT processors: ultra-low power systems-on-chips (SoCs) combining lightweight and flexible micro-controller units (MCUs), often based on open-ISA RISC-V cores, with application-specific accelerators to maximize performance and energy efficiency.
Vega: A 10-Core SoC for IoT End-Nodes with DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode
Vega achieves SoA-leading efficiency of 615 GOPS/W on 8-bit INT computation (boosted to 1. 3TOPS/W for 8-bit DNN inference with hardware acceleration).
Towards Long-term Non-invasive Monitoring for Epilepsy via Wearable EEG Devices
We present the implementation of seizure detection algorithms based on a minimal number of EEG channels on a parallel ultra-low-power embedded platform.
Source Code Classification for Energy Efficiency in Parallel Ultra Low-Power Microcontrollers
The analysis of source code through machine learning techniques is an increasingly explored research topic aiming at increasing smartness in the software toolchain to exploit modern architectures in the best possible way.
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs
In this work, we propose DORY (Deployment Oriented to memoRY) - an automatic tool to deploy DNNs on low cost MCUs with typically less than 1MB of on-chip SRAM memory.
Enabling Mixed-Precision Quantized Neural Networks in Extreme-Edge Devices
The deployment of Quantized Neural Networks (QNN) on advanced microcontrollers requires optimized software to exploit digital signal processing (DSP) extensions of modern instruction set architectures (ISA).
Hardware Architecture Image and Video Processing
Combining Learning and Optimization for Transprecision Computing
The ML model learns the relation between variables precision and the output error; this information is then embedded in the MP focused on minimizing the number of bits.
Distributed, Parallel, and Cluster Computing
